25th Annual Technical Digest 2003. IEEE Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 2003. 2003
DOI: 10.1109/gaas.2003.1252398
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InP HBT integrated circuit technology with selectively implanted subcollector and regrown device layers

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Cited by 7 publications
(2 citation statements)
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“…All layers were grown lattice-matched on semi-insulating InP substrates and the p-type and n-type dopants were Be and Si, respectively. The implanted subcollector HBT process and structure have been reported previously [7], [8]. Fig.…”
Section: Methodsmentioning
confidence: 98%
See 1 more Smart Citation
“…All layers were grown lattice-matched on semi-insulating InP substrates and the p-type and n-type dopants were Be and Si, respectively. The implanted subcollector HBT process and structure have been reported previously [7], [8]. Fig.…”
Section: Methodsmentioning
confidence: 98%
“…This new generation of HBTs offers significantly improved performance, integration, and device reliability. We have fabricated both single HBT(SHBT) and double HBT (DHBT) InP HBT devices with deep-submicron dimensions using a selectively ion-implanted subcollector [7], [8]. The buried subcollector device described here has the advantage of the additional heat spreading capability provided by having the subcollector buried in and surrounded by InP which has high thermal conductivity.…”
Section: Introductionmentioning
confidence: 99%