2016
DOI: 10.1109/jphotov.2016.2598254
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Influence of Metal–Organic Vapor Phase Epitaxy Reactor Environment on the Silicon Bulk Lifetime

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Cited by 24 publications
(12 citation statements)
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“…coefficient, but also the combination of polar and non-polar materials and the high sensitivity of silicon to low levels of impurities, remain significant challenges 31 which require further research and development.…”
mentioning
confidence: 99%
“…coefficient, but also the combination of polar and non-polar materials and the high sensitivity of silicon to low levels of impurities, remain significant challenges 31 which require further research and development.…”
mentioning
confidence: 99%
“…[8] However, a relatively high threading dislocation density after lattice grading still limits the performance of III-V on Si solar cells. [9][10][11] Other issues such as the degradation of minority carrier lifetime in Si due to the overgrowth by metalorganic vapor-phase epitaxy (MOVPE) or molecular-beam epitaxy (MBE) have been studied intensively [12][13][14][15] and can be avoided today. One possibility is applying a SiN x diffusion barrier on the back side of the Si bottom cell to avoid in-diffusion of contaminants from the wafer carrier during high-temperature epitaxy.…”
Section: Introductionmentioning
confidence: 99%
“…One possibility is applying a SiN x diffusion barrier on the back side of the Si bottom cell to avoid in-diffusion of contaminants from the wafer carrier during high-temperature epitaxy. [12] In 1997, Soga et al published an efficiency of 21.2% for a AlGaAs/Si tandem cell measured under AM0 spectral conditions. [16] Under AM1.5g conditions, the best III-V on the Si cell (direct growth) has been a 20.1% efficient GaAsP/Si dual-junction cell by OSU/SolAero/UNSW [17] until now.…”
Section: Introductionmentioning
confidence: 99%
“…First, the high‐temperature (600–700 °C) processing required for III–V epitaxial layers growth can severely degrade the lifetime of minority carriers in the Si bottom cell. [ 27 ] Such degradation of Si cells during the high‐temperature growth of III–V thin films can be minimized by applying a diffusion barrier, such as Al 2 O 3 /SiN x stacked layers, at the back of the Si cell. [ 28 ] These stacked layers offer a slow rate of surface recombination [ 27 ] while acting as a diffusion barrier against the impurities from the susceptor in the metalorganic vapor‐phase epitaxy (MOVPE) reaction chamber.…”
Section: Sequential Growthmentioning
confidence: 99%
“…[ 27 ] Such degradation of Si cells during the high‐temperature growth of III–V thin films can be minimized by applying a diffusion barrier, such as Al 2 O 3 /SiN x stacked layers, at the back of the Si cell. [ 28 ] These stacked layers offer a slow rate of surface recombination [ 27 ] while acting as a diffusion barrier against the impurities from the susceptor in the metalorganic vapor‐phase epitaxy (MOVPE) reaction chamber. [ 29 ] Second, the difference in thermal expansion coefficients may lead to cracking, bowing, or bending of the III–V on Si as they cool to ambient temperature after high‐temperature growth.…”
Section: Sequential Growthmentioning
confidence: 99%