Inductive voltage adder network analysis and model simplification

Abstract

Inductive voltage adder topology has attracted great attentions in pulse power community for near two decades. However, there has been lack of literatures on inductive voltage adder network analysis and circuit design model. We have recently developed a simplified model and a set of simple formulas. An expanded model and more detailed analysis are presented in this paper. Our model reveals the relationship of output waveform parameters and hardware designs. Computer simulations have demonstrated that parameter estimation based on this approach is accurate. This approach can be used in early stages of project development to assist feasibility study, geometry selection in engineering design, and parameter selection of critical components. A set of fimdamental estimation formulas including system impedance, rise time, and number of stages are presented. This approach is also applicable to induction LINAC design. In addition, the model presented in this paper shows a new topology of high voltage waveform generator.

A simplified approach to analyze and model inductive voltage adder

“…Assuming a single-ended 30 stack IVA where ZL is a short, the voltage pulse rise time across ZR can be estimated by using equation (5).…”