2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) 2018
DOI: 10.1109/hst.2018.8383895
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Independent detection of recycled flash memory: Challenges and solutions

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Cited by 20 publications
(6 citation statements)
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“…Logistic regression (LR), support vector machines (SVM), and artificial neural networks (ANN) were used. This expanded the work from Kumari et al [62], enhancing their detection scheme by achieving a counterfeit detection accuracy greater than 97.5% , only requiring 0.05% to 0.96% of the total P/E cycling endurance used. Furthermore, the author used three extra features besides the erase, programming, and bit error metrics used in the previous work to increase the accuracy.…”
Section: Flash Ic Counterfeit Detectionmentioning
confidence: 86%
See 1 more Smart Citation
“…Logistic regression (LR), support vector machines (SVM), and artificial neural networks (ANN) were used. This expanded the work from Kumari et al [62], enhancing their detection scheme by achieving a counterfeit detection accuracy greater than 97.5% , only requiring 0.05% to 0.96% of the total P/E cycling endurance used. Furthermore, the author used three extra features besides the erase, programming, and bit error metrics used in the previous work to increase the accuracy.…”
Section: Flash Ic Counterfeit Detectionmentioning
confidence: 86%
“…Another paper from Kumari et al [62] uses less invasive techniques to extract latency values from aged flash chips in order to detect counterfeits. Instead of a partial programming burst, the latency of different operations such as program and erase is used.…”
Section: Flash Ic Counterfeit Detectionmentioning
confidence: 99%
“…NAND flash memory exhibits limited endurance, which is typically specified by the maximum number of program-erase operations (or PE cycles) allowed on a memory block. The number of PE cycles may impact the nominal page program time, t prog , and stressed pages with a high number of PE cycles may take more time to program [29][30][31]. Hence, an implementation of EXPRESS needs to consider the number of PE cycles.…”
Section: Effects Of Program-erase Cycling On Expressmentioning
confidence: 99%
“…In the future, we will extend our technique for other volatile and non-volatile memory chips (e.g., flash memory, SRAM, etc. [62], [63]). Selecting a robust set of features to improve the accuracy might be another direction of our current research.…”
Section: Limitations and Future Workmentioning
confidence: 99%