Including process-related variability in soft error rate analysis of advanced logic design down to 28 nm based on a foundry PDK

Li, M.; Li, Y. F.; Schrimpf, Ronald D.; Fleetwood, D.M.

doi:10.1109/icsict.2012.6467636

2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology 2012

DOI: 10.1109/icsict.2012.6467636

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Including process-related variability in soft error rate analysis of advanced logic design down to 28 nm based on a foundry PDK

M. Li¹,

Y. F. Li²,

Ronald D. Schrimpf

et al.

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Including process-related variability in soft error rate analysis of advanced logic design down to 28 nm based on a foundry PDK

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References 8 publications

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