In-situ testability design (ISTD)—A new approach for testing high-speed LSI/VLSI logic

Tsui, Frank

doi:10.1109/proc.1982.12231

Cited by 8 publications

(2 citation statements)

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“…Recently, use of the signature analyzer (linear feedback shift register, or LFSR) [1] has became very popular in testing digital circuits and systems. Further developments in self-testing of closed-loop circuits, which often lead to even greater economy of the hardware needed for testing, are described in [3,4,5,6]. This can be explained as a simple organization for self-testing complex chips.…”

Section: Introductionmentioning

confidence: 99%

Ring-like testing of digital circuits

Litikov¹

1991

J Electron Test

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Section: Introductionmentioning

confidence: 99%

Ring-like testing of digital circuits

Litikov¹

1991

J Electron Test

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“…Presently, testing represents 30% of VLSIC production cost [12]. At major microprocessor manufacturers, VLSIC test equipment represent the largest capital investment [12].…”

Section: : Potential For Reducing Testing Costsmentioning

confidence: 99%

A technique for automated validation of fault tolerant designs using laser fault injection (LFI)

Samson

Moreno

Falquez

Digest of Papers. Twenty-Eighth Annual International Symposium on Fault-Tolerant Computing (Cat. No.98CB36224)

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This paper describes the successful development and demonstration of a Laser Fault Injection (LFI) technique to inject soft, i.e., transient, faults into VLSI circuits in a precisely-controlled, non-destructive, non-intrusive manner for the purpose of validating fault tolerant design and performance. The technique described in this paper not only enables the validation of fault-tolerant VLSI designs, but it also offers the potential for performing automated testing of board-level and system-level fault tolerant designs including fault tolerant operating system and application software. The paper describes the results of LFI testing performed to date on test metal circuit structures, i.e., ring oscillators, flip-flops, and multiplier chains, and on an advanced RISC processor, with comprehensive on-chip concurrent error detection and instruction retry, in a working single board computer. Relative to rapid, low cost testing and validation of complex fault tolerant designs, with the automated laser system at the Laser Restructuring Facility at the University of South Florida Center for Microelectronics Research (USF/CMR), a design with 10,000 test points could be tested and validated in under 17 minutes. In addition to describing the successful demonstration of the technique to date, the paper discusses some of the challenges that still need to be addressed to make the technique a truly practical fault tolerant design validation tool.

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Bibliography of literature on testability

Dhillon

Viswanath

1990

Microelectronics Reliability

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In-situ testability design (ISTD)—A new approach for testing high-speed LSI/VLSI logic

Cited by 8 publications

References 0 publications

Ring-like testing of digital circuits

Ring-like testing of digital circuits

A technique for automated validation of fault tolerant designs using laser fault injection (LFI)

Bibliography of literature on testability

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