In-Plane Amorphous Oxide Ionotronic Devices and Circuits with Photochemically Enabled Favorable Interfaces

Abstract

Here, we demonstrate a side-gated in-plane structure of solution-processed amorphous oxide semiconductor ionotronic devices and logic circuits enabled by ion gel gate dielectrics with a monolithically integrated nanoscale passivation architecture. The large capacitance of the electric double layer (EDL) in the ion gel allows a device structure to be a side gate geometry, forming an in-plane structured amorphous In−Ga−Zn− O (a-IGZO) ionotronic transistor, which can be translated into a simplified logic gate configuration with a low operation voltage. Particularly, the monolithic passivation of the coplanar electrodes offers advantages over conventional inhomogeneous passivation, mitigating unintentional parasitic leakage current through the ion gel dielectric layer. More importantly, the monolithically integrated passivation over electrodes was readily obtained with a complementary metal−oxide semiconductor-compatible photochemical process by employing a controlled ultraviolet light manipulation under ozone ambient, which introduced not only much enhanced electrical characteristics but also a scalable device architecture. We investigated various electrical behaviors of the side-gated a-IGZO ionotronic transistor based on EDL, which is called an electric double layer transistor (EDLT), and logic circuits enabled by photochemically realized monolithic aluminum oxide (AlO X ) passivation comparing to the native or polymerized passivation layer, which reveals that the photoassisted AlO X secures highperformance a-IGZO EDLTs with a low off current (<5.23 × 10 −8 A), high on/off ratio (>1.87 × 10 5 ), and exceptional high carrier mobility (>14.5 cm 2 V −1 s −1 ). Owing to the significantly improved electrical characteristics, an inverter circuit was successfully achieved with broad operation voltages from an ultralow V DD of 1 mV to 1.5 V, showing a fully logical voltage transfer characteristic with a gain of more than 4 V V −1 .

Symmetrically Ion‐Gated In‐Plane Metal‐Oxide Transistors for Highly Sensitive and Low‐Voltage Driven Bioelectronics

“…Therefore, to minimize the contact‐induced leakage current and to increase the signal‐to‐noise ratio, a thin monolithic Al 2 O 3 layer was formed on the surface of Al G/S/D electrodes by photochemical surface modification process prior to depositing the IG gate dielectric. [ 21 ] Figure S1a , Supporting Information, shows a cross‐section diagram of R‐EDLT and its SEM image. However, the overlap area is still large because the contact area of G/S/D electrodes and the IG dielectric can be considered as the overlap area.…”

“…As described, the relatively high on/off ratio compared to typical IG‐gated transistors can be attributed to the presence of a monolithic Al 2 O 3 layer on Al electrodes. [ 21 ] Moreover, the high mobility of the device indicates that sufficient charge accumulation can be induced at the channel layer even with the presence of the SU‐8 layer, owing to the high capacitance of EDL formed in the IG gate dielectric layer and the carrier diffusion over the offset as we mentioned above. [ 27 , 28 ] Also, the frequency‐dependent capacitance variation of IG gate dielectric is examined and presented in Figure S1b , Supporting Information.…”

“…More importantly, the thick polymer passivation blocks the electric field between the S/D electrode as well as the gate and S/D as we reported in our previous study. [ 21 ] At the far gate region in Figure S8 , Supporting Information, a relatively low potential level with potential drop was observed over the channel region. This can be attributed to the lower applied gate voltage at points far away from the gate, resulting in a relatively lower charge accumulation effect at the semiconductor surface as depicted in Figure 3c .…”

“…Previously, we demonstrated an IG‐gated in‐plane EDLT operating at a frequency range from static to around 300 Hz. [ 21 ] With its simple device architecture and high carrier mobility using the metal‐oxide semiconductor channel, the IG‐gated in‐plane EDLT can be a promising platform to realize robust EDLTs for integrated bioelectronics.…”

High‐Performance Integrated Iontronic Circuits Based on Single Nano/Microchannels

“…Recently, some artificial ionic ICs have been reported. [11,[28][29][30][31] The general principle for creating ionic ICs is to integrate Recently, artificial channel-based ionic diodes and transistors are extensively studied to mimic biological systems. Most of them are constructed vertically and are challenging to be further integrated.…”