Improving value communication for thread-level speculation

Steffan, J. Gregory; Colohan, Christopher B.; Zhai, Antonia; Mowry, Todd C.

doi:10.1109/hpca.2002.995699

Cited by 65 publications

(90 citation statements)

References 29 publications

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“…Previous works have proposed other schemes to deal with these dependences, e.g. synchronization mechanisms [21], optimistic execution assuming no dependence, hardware value prediction [15] and speculative loop fission [27]. Synchronization can have a significant overhead if dependences are frequent as is the case for many irregular programs in the workloads presented here.…”

Section: A Speculative Threadsmentioning

confidence: 99%

P-slice based efficient speculative multithreading

Ranjan

Marcuello

Latorre

et al. 2009

2009 International Conference on High Performance Computing (HiPC)

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Abstract-Microprocessor industry has recently shifted towards multi-core to take advantage of the ever increasing number of transistors provided by the new technologies. Unfortunately, the multi-core approach does not allow single threaded applications to benefit from the additional cores to improve their execution time. Speculative multithreading (SpMT) has been proposed in the past to boost performance of irregular applications in multi-core environments. In this work, we study the main bottlenecks of these architectures, such as the memory behavior and the pre-computation slices and propose two novel schemes that allow SpMT to get 25% average speedup over single threaded execution. We propose Selective Replication as a technique to improve the performance of the SpMT memory system. This technique does not introduce additional traffic in the bus and improves the performance of a conventionalSpMT memory model by 6% on average and up to 21% for some applications. Also, we propose a scheme called Slice Specialization that reduces the number of instructions in the pre-computation slices by adapting the slice to every single speculative thread spawned. The later proposal outperforms previous schemes with slices by 15% and overall, both techniques combined achieve an improvement of 20% over a conventional SpMT processor.

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Section: A Speculative Threadsmentioning

confidence: 99%

P-slice based efficient speculative multithreading

Ranjan

Marcuello

Latorre

et al. 2009

2009 International Conference on High Performance Computing (HiPC)

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“…In [18,21], frequently occurring dependences are synchronised. The post and wait instructions associated with a synchronised dependence are moved as close as possible.…”

Section: Related Workmentioning

confidence: 99%

Thread-Sensitive Modulo Scheduling for Multicore Processors

Gao

Nguyen

et al. 2008

2008 37th International Conference on Parallel Processing

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“…Different from their approach, we do not insert synchronization to communicate correct values between threads; instead, we try to pre-compute and predict the values for speculative thread, so there is no extra synchronization overhead while may have misprediction penalty. Steffen et al [23] have proposed techniques to improve value communications in TLS computation, including value prediction for both memory values and forwarded values. They found predictors must be throttled to target only those dependences that limit performance, and squashing the prevalent silent stores can greatly improve the TLS performance.…”

Section: Related Workmentioning

confidence: 99%

Exploiting Thread-Level Speculative Parallelism with Software Value Prediction

Li¹,

Yang²,

Du³

et al. 2005

Advances in Computer Systems Architecture

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Software value prediction (SVP) is an effective and powerful compilation technique helping to expose thread-level speculative parallelism. With the help of value analysis and profiling, the compiler identifies critical and predictable variable values and generates speculatively parallelized programs with appropriate value prediction and misprediction recovery code. In this paper, we examine this technique in detail, describe a complete and versatile SVP framework and its detailed implementation in a thread-level speculative parallelization compiler, and present our evaluation results with Spec2000Int benchmarks. Our results not only confirm quantitatively that value prediction is essential to thread-level speculative parallelism, they also show that the corresponding value prediction can be achieved efficiently and effectively by software. We also present evaluation results of the overhead associated with software value prediction and the importance of different value predictors in speculative parallel loops in Spec2000Int benchmarks.

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Improving value communication for thread-level speculation

Abstract: Thread-Level Speculation (TLS)

Cited by 65 publications

References 29 publications

P-slice based efficient speculative multithreading

P-slice based efficient speculative multithreading

Thread-Sensitive Modulo Scheduling for Multicore Processors

Exploiting Thread-Level Speculative Parallelism with Software Value Prediction

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