Improving the accuracy of rule-based equivalence checking of system-level design descriptions by identifying potential internal equivalences

Yoshida, Hiroaki; Fujita, Masahiro

doi:10.1109/isqed.2009.4810322

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Cited by 2 publications

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“…For this purpose, an rule-based equivalence checking method for system-level design description has been proposed [7], [8]. The rule-based equivalence checking of system-level design descriptions proves the equivalence of two design descriptions by applying a set of local equivalence rules in a bottom-up manner.…”

Section: Introductionmentioning

confidence: 99%

Rule-based equivalence checking of system-level design descriptions

Yoshida

Fujita

2009

2009 International Conference on Communications, Circuits and Systems

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Abstract-This paper presents our study on rule-based equivalence checking of system-level design descriptions. The rule-based equivalence checking proves the equivalence of two system-level design descriptions by applying equivalence rules in a bottom-up manner. In this paper, we first introduce our intermediate representation of system-level design, and then show a set of representative equivalence rules. Since our equivalence checking method is based on potential internal equivalences identified by using random simulation, we also present how to prove the equivalence based on such potential internal equivalences. Finally, we explain our implementation of the rule-based equivalence checker and demonstrate its feasibility and efficiency using an example design.

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Section: Introductionmentioning

confidence: 99%