Improving Test Chip Design Efficiency via Machine Learning

Liu, Zeye; Huang, Qicheng; Fang, Chenlei; Blanton, R. D.

doi:10.1109/itc44170.2019.9000131

Cited by 4 publications

(2 citation statements)

References 13 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…If we can predict the test set quality and select good parts in advance, the cost can be reduced significantly. Liu et al [97] focus on optimizing the test set design via ML, of which the proposed flow is shown in Figure 16. In a traditional testing flow, every possible configuration in a logic library is synthesized, which causes huge time and energy consumption.…”

Section: Test Set Redundancymentioning

confidence: 99%

“…Their results show that HFMV can detect rare circuit faults. Statistical Model [38], [142] Search Methods [132], [49] Rule Learning [57], [69], [33] CNN, SVM, et al [24], [47], [143] GCN [101] Analog/RF Design KNN, ONN [138] Regression [117] Semiconductor Technology CNN [97] Test Complexity Reduction Digital Design SVM, MLP, CNN, et al [107] Analog/RF Design ONN [139] Active Learning [58] bug classification and localization. The related works on ML for testing problems are summarized in Table 7.…”

Section: Test Set Redundancymentioning

confidence: 99%

See 1 more Smart Citation

Machine Learning for Electronic Design Automation: A Survey

Huang

et al. 2021

Preprint

View full text Add to dashboard Cite

With the down-scaling of CMOS technology, the design complexity of very large-scale integrated (VLSI) is increasing. Although the application of machine learning (ML) techniques in electronic design automation (EDA) can trace its history back to the 90s, the recent breakthrough of ML and the increasing complexity of EDA tasks have aroused more interests in incorporating ML to solve EDA tasks. In this paper, we present a comprehensive review of existing ML for EDA studies, organized following the EDA hierarchy.

show abstract

Section: Test Set Redundancymentioning

confidence: 99%