Improving Integrated Circuit Performance Through the Application of Hardness-by-Design Methodology

Lacoe, R.C.

doi:10.1109/tns.2008.2000480

Cited by 131 publications

(72 citation statements)

References 52 publications

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“…Non Destructive Readout allows for Correlated Double Sampling (CDS) (El Gamal and Eltoukhy 2005) and online dose sensing. The DynAMITe sensor has also been designed according to the radiation hardness-by-design methodology (Lacoe 2008). In fact all the in-pixel transistors have been designed with source and drain physically enclosed according to the Enclosed Layout Geometry and P+ doped guard rings have been added in each pixels, in order to reduce radiation induced edge and inter-device leakage current, respectively.…”

Section: Page 6 Of 24 Confidential -For Review Only Pmb-100279r1mentioning

confidence: 99%

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

Esposito

Anaxagoras²,

Konstantinidis

et al. 2014

Phys. Med. Biol.

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Abstract:Recently CMOS Active Pixels Sensors (APSs) have become a valuable alternative to amorphous Silicon and Selenium Flat Panel Imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Nonuniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ≤ 1.9%. The uniformity of the image quality performance has been further investigated in a typical X-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practise. Finally, in order to compare the CONFIDENTIAL -FOR REVIEW ONLY PMB-100279.R1detection capability of this novel APS with the currently used technology (i.e. FPIs), theoretical evaluation of the Detection Quantum Efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this detector compared to FPIs. Optical characterization, X-ray contrast measurements and theoretical DQE evaluation suggest that a trade off can be found between the need of a large imaging area and the requirement of a uniform imaging performance, making the DynAMITe large area CMOS APS suitable for a range of bio-medical applications. in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uni...

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Section: Page 6 Of 24 Confidential -For Review Only Pmb-100279r1mentioning

confidence: 99%

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

Esposito

Anaxagoras²,

Konstantinidis

et al. 2014

Phys. Med. Biol.

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“…In fact all the in-pixel transistors have been designed with source and drain physically enclosed using an Enclosed Layout Geometry (ELG) [10], [11] in order to reduce the edgeleakage, which is generated in the transition area between the thin gate oxide and the thick field oxide, used to produce transistor-by-transistor insulation, after exposure to radiation. P + doped guard rings have been added in each pixels to prevent radiation induced inter-device leakage current.…”

Section: B the Radiation Hard Design Of The Dynamite Detectormentioning

confidence: 99%

“…In order for CMOS APSs to impact upon the medical ionzing applications area, then it needs to demonstrate a significant radiation hardness. Several investigations have been carried out to assess the radiation tolerance of CMOS devices [8], [9] and to propose new design techniques to enhance this performance [10]. In this paper we propose a novel wafer scale CMOS APS, developed in the framework of the Multidimensional Integrated Intelligent Imaging Plus (MI-3 Plus) consortium.…”

Section: Introductionmentioning

confidence: 99%

“…In this paper we propose a novel wafer scale CMOS APS, developed in the framework of the Multidimensional Integrated Intelligent Imaging Plus (MI-3 Plus) consortium. This detector has been designed for bio-medical applications and offers a high radiation hardness-by-design [10]. The radiation hardness of this detector has been characterized and the results have been compared with a commercial CMOS APS for radiology applications.…”

Section: Introductionmentioning

confidence: 99%

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Radiation hardness of a large area CMOS active pixel sensor for bio-medical applications

Esposito

Anaxagoras²,

Díaz

et al. 2012

2012 IEEE Nuclear Science Symposium and Medical Imaging Conference Record (NSS/MIC)

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Abstract-A wafer scale CMOS Active Pixel Sensor has been designed employing design techniques of transistor enclosed geometry and P+ doped guard rings to offer ionizing radiation tolerance. The detector was irradiated with 160 kVp X-rays up to a total dose of 94 kGy(Si) and remained functional. The radiation damage produced in the device has been studied, resulting in a dark current density increase per decade of 96±5 pA/cm 2 /decade and a damage threshold of 204 Gy(Si). The damage produced in the detector has been compared with a commercially available CMOS APS, showing a radiation tolerance about 100 times higher. Moreover Monte Carlo simulations have been performed to evaluate primary and secondary energy deposition in each of the detector stages.

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“…Two major radiation effects should be mentioned: the total cumulative dose called Total Ionizing Dose (TID) which is related to interactions between the semiconductor and the trapped particles, and transient events called Single Event Effects (SEE) resulting from high energy particles and random occurrences [7], [8]. Nowadays, instead of using technologies dedicated to space (such as specific BiCMOS or SOI) in order to improve the radiation hardness of integrated circuits, it seems appropriate to use specific design techniques (radiation hardening by design (RHBD)) [7], [9] applied on standard CMOS technologies which are less expensive [10], provide higher performances and for which parasitic effects are studied and well known [11], [12]. The choice of the technology depends first on the duration of the mission as well as on the radiative environments which is related to the space probe orbit trajectory.…”

Section: Introductionmentioning

confidence: 99%

Low Noise CMOS Analog Front-End Circuit With an 8-bit 1-MS/s ADC for Silicon Sensors for Space Applications

et al. 2014

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A low power analog front-end circuit for silicon (Si) detectors has been fabricated in 0.35 µm CMOS technology. It has been designed to read out signals from large-capacitance Si detectors for incident electron energy ranging from 50 keV to 725 keV. In order to quantify electron energy, the front-end integrates a charge preamplifier, a pulse shaper, a peak detector and an event-driven analog-to-digital converter (ADC). The complete front end including the ADC dissipates 2.5 mW for a maximum electron detecting rate of 650 kHz. The charge-to-voltage gain is approximately 60 mV/fC for a charge range of 0.6 fF to 32 fF. The measured equivalent noise charge (ENC) is 3119 e − for a 40 pF detector parasitic capacitance. Index TermsSi Detector, Charge preamplifier, electron energy measurement.

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Improving Integrated Circuit Performance Through the Application of Hardness-by-Design Methodology

Cited by 131 publications

References 52 publications

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

Radiation hardness of a large area CMOS active pixel sensor for bio-medical applications

Low Noise CMOS Analog Front-End Circuit With an 8-bit 1-MS/s ADC for Silicon Sensors for Space Applications

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