Improvements in 2D p-type WSe2 transistors towards ultimate CMOS scaling

Abstract

This paper provides comprehensive experimental analysis relating to improvements in the two-dimensional (2D) p-type metal–oxide–semiconductor (PMOS) field effect transistors (FETs) by pure van der Waals (vdW) contacts on few-layer tungsten diselenide (WSe2) with high-k metal gate (HKMG) stacks. Our analysis shows that standard metallization techniques (e.g., e-beam evaporation at moderate pressure ~ 10–5 torr) results in significant Fermi-level pinning, but Schottky barrier heights (SBH) remain small (< 100 meV) when using high work function metals (e.g., Pt or Pd). Temperature-dependent analysis uncovers a more dominant contribution to contact resistance from the channel access region and confirms significant improvement through less damaging metallization techniques (i.e., reduced scattering) combined with strongly scaled HKMG stacks (enhanced carrier density). A clean contact/channel interface is achieved through high-vacuum evaporation and temperature-controlled stepped deposition providing large improvements in contact resistance. Our study reports low contact resistance of 5.7 kΩ-µm, with on-state currents of ~ 97 µA/µm and subthreshold swing of ~ 140 mV/dec in FETs with channel lengths of 400 nm. Furthermore, theoretical analysis using a Landauer transport ballistic model for WSe2 SB-FETs elucidates the prospects of nanoscale 2D PMOS FETs indicating high-performance (excellent on-state current vs subthreshold swing benchmarks) towards the ultimate CMOS scaling limit.

Tuning Polarity in WSe2/AlScN FeFETs via Contact Engineering

“…This can be attributed to the high e-beam power required for Pt evaporation, , resulting in severe damage to the WSe 2 . While previous reports suggest that Pt can be a suitable p-type contact metal for 2D TMD FETs if it is deposited with a low deposition rate in a high-vacuum environment, ,, further optimization of Pt deposition conditions (e.g., metal-to-substrate distance) for p-type FeFETs will be necessary in future work.…”

Point-like vacancies in two-dimensional transition metal dichalcogenides

“…Among the various defects, antisite defects [14], chalcogen atom vacancies [15,16], and nitrogen/oxygen impurities [17] are noteworthy contributors to mid-gap states in monolayer TMDs. These mid-gap defects might effectively act as recombination centers or carrier traps under different conditions [18].…”

Impact of Thermal Annealing on the Interaction Between Monolayer MoS2 and Au

“…In particular, good contacts cannot be made to p ‐type devices and large variabilities are seen for n‐type contacts. [ 4–7 ]…”

“…In particular, good contacts cannot be made to p-type devices and large variabilities are seen for n-type contacts. [4][5][6][7] Experiments have shown that degrees of hybridization and defect generation during the metallization process plays a critically important role in determining the contact resistance. [8][9][10][11][12] Specifically, mechanical transfer of metals results in van der Waals contacts with reduced pinning and enhanced performance.…”

“…[8][9][10][11][12] Specifically, mechanical transfer of metals results in van der Waals contacts with reduced pinning and enhanced performance. [11,12] Furthermore, varying substrate temperatures can result in n-and p-type devices [7][8][9] due to the different degrees of defect generation and hybridization during the metallization process. Investigations on monolayer MoS 2 produced using gold-assisted mechanical exfoliation [13,14] have shown that the hybridization occurs on the nanoscale and that its degree varies significantly across the sample.…”