2009 International Semiconductor Device Research Symposium 2009
DOI: 10.1109/isdrs.2009.5378309
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Improvement of static noise margin in SRAM by post-fabrication self-convergence technique

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Cited by 6 publications
(10 citation statements)
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“…The gate voltage is the same as the source voltage, and the NBTI stress is not applied to p-OFF. As a result, the cell stability is improved [20]- [22].…”
Section: Self-improvement Techniquementioning
confidence: 99%
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“…The gate voltage is the same as the source voltage, and the NBTI stress is not applied to p-OFF. As a result, the cell stability is improved [20]- [22].…”
Section: Self-improvement Techniquementioning
confidence: 99%
“…Recently, we have proposed a new concept of a postfabrication technique to improve the stability of SRAM cells automatically by simply applying stress voltage to the V DD terminal of SRAM cell array [20], [21]. This technique can apply to the stability self-improvement in both the read operation [20], [21] and the retention operation [22]. When applied to the retention self-improvement, the stronger nFET and pFET out of four transistors in the two inverters are selectively stressed and their |V TH | is raised (and hence these transistors are weakened), while the weaker nFET and pFET are not stressed, resulting in automatic self-improvement of the cell stability.…”
Section: Introductionmentioning
confidence: 99%
“…In this study, a post-fabrication scheme for suppression of variability is proposed [14,[19][20]. The key in this concept is the "self-convergence" mechanism.…”
Section: Self-improvement Of Sram Cell Stabilitymentioning
confidence: 99%
“…On the other hand, "p-low", which is weaker, is not stressed because "p-low" is at the OFF state. As a result, the cell stability is improved [14,[19][20]. 8.…”
Section: Self-improvement Of Sram Cell Stabilitymentioning
confidence: 99%
“…Previously, we proposed a post fabrication SRAM selfimprovement technique, which automatically improves the SRAM cell stability by simply applying a high stress voltage to the power supply terminal. [12][13][14][15] Bias temperature instability (BTI) stress selectively not only weakens the stronger one [12][13][14] but strengthens the weaker one 15,16) of pair transistors in each SRAM cell, resulting in the stability improvement of unstable cells in read 13,14) and retention 13,15) operations. However, one of the demerits of this technique is that stable cells will also be affected by the stress, and their stability can be worsened.…”
Section: Introductionmentioning
confidence: 99%