Improvement of isolation for MEMS capacitive switch via membrane planarization

Yu, Aibing; Liu, A.Q.; Zhang, Q.X.; Alphones, A.; Li, Zhu; Shacklock, A.

doi:10.1016/j.sna.2004.09.010

Cited by 44 publications

(26 citation statements)

References 4 publications

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“…It was also worthy to note that there was not obvious resonant phenomenon in the measured isolation curve of the switch of PZT/HfO 2 dielectric stack. Similar phenomenon has been reported by other researchers during the development of RF capacitive switch with high down-to-up capacitance ratio (13) and our previous work (7) . The absence of the resonant phenomenon might also be due to the intrinsic piezoelectric property of PZT layer and complicated response of the interface between PZT and HfO 2 .…”

Section: Resultssupporting

confidence: 91%

High-k Dielectrics for Application in Broadband Radio Frequency-Microelectromechanical System Capacitive Shunt Switch

Zhang

Ichiki

et al. 2007

IEEJ Trans. SM

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The performance of RF MEMS capacitive shunt switch is dominantly determined by the insulator layer. Thin high-k dielectric is preferred for achieving high down-state capacitance, which in particularly determines the switch performance at low frequency range. It is also well known that the reliability of RF capacitive switches is mainly determined by the charging of the insulator layer if package is hermetic and near-hermetic. SiO 2 and Si 3 N 4 are still the most-commonly used insulator materials because of their technology maturity. Switches of SiO 2 and Si 3 N 4 have limited isolation performance due to their low dielectric constant. As a result, much of recent effort has been devoted to seeking new high-k dielectrics. SrTiO 3 (k = ~ 200), Ta 2 O 5 (k = ~ 22), and (Ba, Sr)TiO 3 (k= ~ 29) dielectric have been investigated. It is worthy to note that HfO 2 -based dielectrics, which are leading candidate materials for next generation of high-k gate dielectric, have been being ignored in RF MEMS capacitive switch. High isolation performance had been achieved for RF MEMS capacitive switch using 250 nm-thick PZT/100 nm-thick HfO 2 stack dielectric in our previous work. It would be interesting to examine application of single HfO 2 dielectric layer in RF-MEMS capacitive switch. In this work, π-type RF-MEMS capacitive shunt switches of PZT/HfO 2 stack and single HfO 2 dielectric would be developed and characterized for broadband application. Figure 1 illustrates schematic structure of the π-type RF-MEMS capacitive shunt switch, which was fabricated using 5 masks in this work. The insulator layer is 100 µm square.Polycrystalline PZT layer in 130 nm thick was achieved after annealing at 500 o C using the sol-gel procedure. HfO 2 dielectric was prepared by sputtering. The PZT film had the dielectric constant of about 1185 at 1k Hz and the remanent polarization Pr of 9.86µC/cm 2 . The HfO 2 had the dielectric constant of about 17and the dielectric strength of about 24 MV/cm. Figure 2 shows the measured RF performance of the prepared RF MEMS switches. All the prepared switches had insertion loss better than -0.75 dB in the whole measured frequency range (1~35 GHz). The switches exhibited excellent isolation performance in a broadband range (1~35 GHz). The switch of HfO 2 has the isolation performance better than -40 dB in the sweep frequency range of 5 ~ 35 GHz. The PZT/HfO 2 stack dielectric-based switch had the isolation better than -20 dB within the whole sweep frequency range. The PZT layer had complicated effects. 130 nm-thick lead zirconate titanate(PZT)/45 nm-thick HfO 2 stack and single 45 nm-thick HfO 2 dielectric film were utilized as insulator layer in π-type radio frequency (RF) capacitive shunt switches for achieving high isolation performance in broadband application. Thin PZT film in perovskite structure mainly with (1 1 1) orientation was successfully prepared at low temperature (500 o C) using sol-gel method. The thin PZT film exhibited excellent ferroelectric properties and high dielectric constant (k ≈ 1...

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Section: Resultssupporting

confidence: 91%

High-k Dielectrics for Application in Broadband Radio Frequency-Microelectromechanical System Capacitive Shunt Switch

Zhang

Ichiki

et al. 2007

IEEJ Trans. SM

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“…This down-state capacitance degradation problem is usually a result of nonplanarization of metal bridge, surface roughness of capacitance area and etching hole in the metal bridge. [10,11]. Fig.…”

Section: Capacitive Switchesmentioning

confidence: 98%

“…The surface roughness of the capacitance area can be improved by using a refractory metal layer underneath the metal bridge [9]. Flat metal bridge can be obtained by planarizing the sacrificial layer underneath the metal bridge [10,11].…”

Section: Surface Planarization Techniquementioning

confidence: 99%

See 1 more Smart Citation

RF MEMS Switches and Integrated Switching Circuits

Liu

2010

MEMS Reference Shelf

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Abstract-Radio frequency (RF) microelectromechanical systems (MEMS) have been pursued for more than a decade as a solution of high-performance on-chip fixed, tunable and reconfigurable circuits. This paper reviews our research work on RF MEMS switches and switching circuits in the past five years. The research work first concentrates on the development of lateral DC-contact switches and capacitive shunt switches. Low insertion loss, high isolation and wide frequency band have been achieved for the two types of switches; then the switches have been integrated with transmission lines to achieve different switching circuits, such as single-pole-multi-throw (SPMT) switching circuits, tunable band-pass filter, tunable band-stop filter and reconfigurable filter circuits. Substrate transfer process and surface planarization process are used to fabricate the above mentioned devices and circuits. The advantages of these two fabrication processes provide great flexibility in developing different types of RF MEMS switches and circuits. The ultimate target is to produce more powerful and sophisticated wireless appliances operating in handsets, base stations, and satellites with low power consumption and cost.

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“…The non-flat membrane is occurred because of the uneven surface between signal and ground lines after patterning the first layer of the CPW, the type and the characteristic of photoresist (size, thickness), the techniques of coating (spin, spray, or electro deposition), the lithography parameters (temperature, UV exposure, and developing). This uneven surface causes deterioration in performance of the switch as it increases the fringing capacitance, and reduces the contact between the electrodes [5]. A flat membrane was reported in [6,7] by filling the gap after patterning the CPW followed by a chemical-mechanical polishing (CMP).…”

Section: Introductionmentioning

confidence: 99%