Improvement in Performance of Carbon Nanotube Field-Effect Transistors on Patterned SiO2/Si Substrates

Abstract

Horizontally aligned single-walled carbon nanotubes (SWNTs) were fabricated on patterned SiO 2 /Si substrates with groove-and-terrace structures, which were obtained using electron-beam lithography and reactive ion etching. Scanning electron microscopy observation revealed that SWNTs were aligned in the direction parallel to the groove-and-terrace structures and were preferentially grown along the edges of terraces. Using aligned SWNTs as multichannels, carbon nanotube field-effect transistors (CNTFETs) were fabricated on the patterned SiO 2 /Si substrates. This method will be promising to control the direction of SWNTs on SiO 2 /Si substrates for fabrication of highperformance CNTFETs with high current outputs.

External-Noise-Induced Small-Signal Detection with Solution-Gated Carbon Nanotube Transistor

“…Single-walled CNTs were grown on a Si substrate with a SiO 2 layer by thermal chemical vapor deposition using ethanol as the carbon source. 17) One CNT, whose diameter is 1-2 nm, 18) was bridged between the source and drain electrodes. Source and drain contacts were formed on a patterned chemical catalyst, and then a silicone rubber chamber was placed on the CNTFET.…”

Robust Noise Characteristics in Carbon Nanotube Transistors Based on Stochastic Resonance and Their Summing Networks

“…Nowadays, CNTs have been aligned in specific crystallographic directions on single-crystal or patterned substrates. [38][39][40][41] As a result, CNT-FETs with multichannel have been fabricated. Multichannel CNT-FETs can be applied to CNT-FET-based summing networks.…”

Carbon Nanotube-Based Floating Gate Memories with High-k Dielectrics

“…Figure 1(b) shows a scanning electron microscopy (SEM) image of the top view of the floating-gated CNTFETs, revealing that one SWNT or bundled SWNTs bridged the source and drain electrodes. 46) The width of the top-gate electrode was 500 nm. Figure 2(a) shows the transfer characteristics of the floatinggated CNTFETs as functions of top-gate voltage.…”

“…Figure 1(b) shows a scanning electron microscopy (SEM) image of the top view of the floating-gated CNTFETs, revealing that one SWNT or bundled SWNTs bridged the source and drain electrodes. 46) The width of the top-gate electrode was 500 nm. In addition, the hysteresis width was also measured by sweeping the top-gate bias between À8 and 8 V, and À2 and 2 V for each device.…”