Improvement in Mobility and Negative-Bias Temperature Instability in Metal–Oxide–Semiconductor Field-Effect Transistors with Atomic-Layer-Deposited Si–Nitride/SiO₂ Stack Dielectrics

Abstract

Carrier mobility and negative-bias temperature instability (NBTI) characteristics were studied for p þ polycrystalline Si-gated metal-oxide-semiconductor field-effect transistors (MOSFETs) with various gate dielectrics: atomic-layer-deposited (ALD) Si-nitride/SiO 2 stack, plasma-nitrided SiON, and pure-SiO 2 dielectrics. MOSFETs with the ALD Si-nitride/SiO 2 stack dielectrics offer the lowest interface trap density and highest carrier mobility among the three samples owing to their superior ability to suppress boron penetration. P-channel MOSFETs with the ALD stack dielectrics exhibit an abnormal NBTI behavior: threshold voltage shift (ÁV th ) is positive at the early stress stage and then becomes negative at longer stress times. Such a turnaround behavior may be attributed to the presence of preexisting neutral electron traps in the Si-nitride/SiO 2 stack dielectrics, which may lead to the net ÁV th of the stack dielectrics stressed at a low voltage to be even smaller than that of the pure-SiO 2 dielectrics. The above-mentioned findings suggest that the ALD Si-nitride/SiO 2 stack dielectrics are very promising for sub-0.1-mm MOSFETs.