2005
DOI: 10.1016/j.mssp.2004.09.076
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Improvement in epitaxial quality of selectively grown Si1−xGex layers with low pattern sensitivity for CMOS applications

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Cited by 8 publications
(5 citation statements)
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“…There are different models to design the chip layout in order to control the pattern dependency. These designs compensate for the exposed Si variations by introducing dummy openings [ 23 , 24 , 25 , 26 , 27 ].…”
Section: Introductionmentioning
confidence: 99%
“…There are different models to design the chip layout in order to control the pattern dependency. These designs compensate for the exposed Si variations by introducing dummy openings [ 23 , 24 , 25 , 26 , 27 ].…”
Section: Introductionmentioning
confidence: 99%
“…Non-uniformity of epi-deposition will also cause differences from wafer to wafer as chip design or the architecture (oxide or nitride with a specific thickness) changes (3). Many studies have explored methods to improve layer profile uniformity over a wafer (4)(5)(6)(7).…”
Section: Introductionmentioning
confidence: 99%
“…No matter which Si source was used, it is widely reported that there is a difference between epitaxial SiGe growth rates on patterned and blanket wafers. [2][3][4][5][6][7][8][9] The loading effect depends on the Si/dielectrics filling ratio ͑global effect͒ and the opening size of the windows ͑local effect͒. Reducing the total pressure or increasing HCl flow has been found to improve loading performance.…”
mentioning
confidence: 99%
“…[2][3][4] Previous studies, however, have focused on structures larger than 0.1 m 2 . [2][3][4][5][6][7][8][9] Advanced Si technologies usually involve active areas less than 0.01 m 2 , which pushes the previously termed "local effect" into more like a "global effect." In this paper we discuss the selective growth behavior of SiGe using SiH 4 and DCS as Si sources, with an emphasis on the growth rate on Si͑001͒ with different active area sizes down to 0.01 m 2 .…”
mentioning
confidence: 99%
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