Improvement in current drivability and stability in nanoscale vertical channel thin-film transistors via band-gap engineering in In–Ga–Zn–O bilayer channel configuration

Abstract

Vertical channel thin film transistors (VTFTs) have been expected to be exploited as one of the promising three-dimensional devices demanding a higher integration density owing to their structural advantages such as small device footprints. However, the VTFTs have suffered from the back-channel effects induced by the pattering process of vertical sidewalls, which critically deteriorate the device reliability. Therefore, to reduce the detrimental back-channel effects has been one of the most urgent issues for enhancing the device performance of VTFTs. Here we show a novel strategy to introduce an In-Ga-Zn-O (IGZO) bilayer channel configuration, which was prepared by atomic-layer deposition (ALD), in terms of structural and electrical passivation against the back-channel effects. Two-dimensional electron gas was effectively employed for improving the operational reliability of the VTFTs by inducing strong confinement of conduction electrons at heterojunction interfaces. The IGZO bilayer channel structure was composed of 3-nm-thick In-rich prompt (In/Ga=4.1) and 12-nm-thick prime (In/Ga=0.7) layers. The VTFTs using bilayer IGZO channel showed high on/off ratio (4.8×109), low SS value (180 mV/dec), and high current drivability (13.6 µA/µm). Interestingly, the strategic employment of bilayer channel configurations has secured excellent device operational stability representing the immunity against the bias-dependent hysteretic drain current and the threshold voltage instability of the fabricated VTFTs. Moreover, the threshold voltage shifts of the VTFTs could be suppressed from +5.3 to +2.6 V under a gate bias stress of +3 MV/cm for 104 s at 60 °C, when the single layer channel was replaced with the bilayer channel. As a result, ALD IGZO bilayer configuration could be suggested as a useful strategy to improve the device characteristics and operational reliability of VTFTs.

Research Progress of Vertical Channel Thin Film Transistor Device

“…In the optimized active layer, the IGZO active layer suitable for V-TFT can be obtained by adjusting the different components of four elements in IGZO in ALD. Sung et al deposited two different types of IGZO films in the vertical sidewall by adjusting the super cycle ratio of ALD to change the In, Ga, and Zn elements in IGZO, forming a double active layer [55]. Figure 8a-c In addition to using IGZO as the active layer, Yin et al used co sputtering deposi of composite crystal ITO-ZnO as the active layer of V-TFT [56].…”