Improved three-step de-embedding method to accurately account for the influence of pad parasitics in silicon on-wafer RF test-structures

Measurement of High-Frequency Characteristics of CNTFETs and Equivalent Circuit Model Analysis

“…Therefore, we applied the de-embedding procedure to effectively eliminate the parasitic error matrix, and only the S-parameters of the transistor were extracted using open-short-through standards on the substrate. This method is basically the same as that described in Vandamme et al (8) and Temeijer et al (9). The equivalent circuit of the RF test-structure, including pads and CNTFETs, is shown in Figure 2-b.…”

On the small signal modeling of advanced microwave FETs: A comparative study

“…This higher complexity necessitates the use of the combined method for extrinsic ECP determination, whereas only using the ''cold'' method was sufficient in case of the GaAs HEMT. [27]. As a result, the elements C pg , R pgs , C pgs and C pd , R pds , C pds can be extracted from Y in and Y out .…”

“…As a consequence, an accurate extraction of the parasitic ECPs is at the heart of a successful analytical modeling. The two main approaches to determine the parasitic ECPs are based on S-parameter measurements performed on the transistor under ''cold'' condition (V ds 5 0 V, i.e., passive device) and/or on test structures [25][26][27][28]. As will be shown in the following, there are advantages and disadvantages with both extrinsic element extraction approaches, and therefore it is important to choose the method, or combination of methods, that best suits the specific case.…”

A Thru-Only De-Embedding Method Foron-Wafer Characterization of Multiport Networks

“…De-embedding procedures are becoming increasingly complex and tend to require several dummy patterns (Kolding, 2000b;Vandamme et al, 2001;Wei et al, 2007). The high cost associated with the large area required for dummy patterns is a drawback of advanced de-embedding methods.…”