Improved symbol value selection for symbol flipping-based non-binary LDPC decoding

Abstract

Symbol flipping-based hard decision decoding for non-binary low-density parity check (LDPC) codes has attracted much attention due to low decoding complexity even though the error performance of the symbol flipping decoder is inferior to that of the soft decision decoders. Standard symbol flipping decoding involves two steps, selection of the symbol position to be flipped and selection of the flipped symbol value. In this paper, an improved symbol value selection algorithm is developed for symbol flipping-based non-binary LDPC decoding. The key idea of the proposed algorithm is to use the complete information on correlation among the code symbols, in addition to their initial reliabilities when value of the flipped symbol is decided. The proposed algorithm offers improved error performance over the existing approaches of flipped symbol value selection which are solely based on the initial symbol reliabilities, with only a non-significant increase in complexity. At the same time, the proposed algorithm is low in complexity compared to other symbol flipping-based LDPC decoding algorithms which use the information on correlation among the code symbols in selecting the flipped symbol value.

A construction of the high-rate regular quasi-cyclic LDPC codes

“…Then, we select the first k = 13 submatrices and perform (12) to (37) and (38) separately which yields a regular quasi-cyclic 315 × 4095 parity-check matrix H (1) qc defined in (37) as well as a 630 × 8190 parity-check matrix H (2) qc defined in (38) respectively. The null spaces of H (1) qc and H (2) qc render a regular quasi-cyclic (4095, 3781) LDPC code as well as a (8190, 7561) LDPC code with the coding rate 12/13 . Similarily, we also choose the first k = 12 submatrices and perform (12) to (38) which yields a regular quasi-cyclic 630 × 7560 parity-check matrix H (2) qc defined in (38).…”

“…The null spaces of H (1) qc and H (2) qc render a regular quasi-cyclic (4095, 3781) LDPC code as well as a (8190, 7561) LDPC code with the coding rate 12/13 . Similarily, we also choose the first k = 12 submatrices and perform (12) to (38) which yields a regular quasi-cyclic 630 × 7560 parity-check matrix H (2) qc defined in (38). The null space of this H (2) qc also renders a regular quasi-cyclic (7560, 6931) LDPC code with the coding rate 11/12 .…”

“…Substituting H (1) qc for H qc and proceeding the procedure from (12) to (36) with λ = 0, we can get a new S (1) from (36). Then, we can construct another regular quasi-cyclic parity-check matrix H (2) qc as follows: H (2) qc = H (1) qc ⊕ S (1) S (1) S (1) H (1) qc ⊕ S (1) .…”

“…Low-density parity-check (LDPC) codes [1], which is one of the main error-correcting codes, has been widely used in various practical applications [2,3]. However, the highrate regular QC-LDPC codes which are prone to the hardware implementation [4] and particularly suited for many practical applications can be constructed only for very restricted code parameters, such as code rate and code length.…”

Sum of the Magnitude for Hard Decision Decoding Algorithm Based on Loop Update Detection

“…Therefore, the SDA is chosen mainly from the perspective of reducing the decoding complexity of the study [11], with the improved algorithm applied to 5G mobile communications in the human-centric high-speed communications. The representative algorithm in HDA is a bit-flipping (BF) algorithm [12], which has low complexity and computational complexity. The algorithm is simple and easy to implement in hardware, but the decoding performance is not as good as the SDA.…”