2023
DOI: 10.1007/s42514-023-00149-9
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Improved parallel matrix multiplication using Strassen and Urdhvatiryagbhyam method

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Cited by 50 publications
(1 citation statement)
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“…• In the first paper, Bessant et al (2023) propose a parallel multiplication architecture using Strassen and UrdhvaTiryagbhyam multiplier, which involves design of efficient parallel matrix multiplication with flexible implementation of FPGA devices. The architecture incorporates scheduling of blocks, operations on processing elements, block size determination, parallelization and double buffering for storage of matrix elements.…”
mentioning
confidence: 99%
“…• In the first paper, Bessant et al (2023) propose a parallel multiplication architecture using Strassen and UrdhvaTiryagbhyam multiplier, which involves design of efficient parallel matrix multiplication with flexible implementation of FPGA devices. The architecture incorporates scheduling of blocks, operations on processing elements, block size determination, parallelization and double buffering for storage of matrix elements.…”
mentioning
confidence: 99%