Improved Carrier Injection in Ultrathin-Body SOI Schottky-Barrier MOSFETs

Zhang, M.; Knoch, Joachim; Appenzeller, Joerg; Mantl, S.

doi:10.1109/led.2007.891258

Cited by 45 publications

(29 citation statements)

References 10 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…10), then the maximum potential barrier that determines the current flow is not the SB but lies approximately in the middle of the channel, and the SB-FET in this regime behaves rather like a conventional FET. Consequently, one expects a steep inverse subthreshold slope in this regime, which is, indeed, experimentally observed [47]. Once the bands are moved below Φ SB , the injection of carriers is given by thermal emission over and thermally assisted tunneling through the SB.…”

Section: A Transport In Sb-nw-fets-off Statesupporting

confidence: 55%

Toward Nanowire Electronics

Appenzeller

Knoch

Björk

et al. 2008

IEEE Trans. Electron Devices

Self Cite

340

232

View full text Add to dashboard Cite

Abstract-This paper discusses the electronic transport properties of nanowire field-effect transistors (NW-FETs). Four different device concepts are studied in detail: Schottky-barrier NW-FETs with metallic source and drain contacts, conventionaltype NW-FETs with doped NW segments as source and drain electrodes, and, finally, two new concepts that enable steep turn-on characteristics, namely, NW impact ionization FETs and tunnel NW-FETs. As it turns out, NW-FETs are, to a large extent, determined by the device geometry, the dimensionality of the electronic transport, and the way of making contacts to the NW. Analytical as well as simulation results are compared with experimental data to explain the various factors impacting the electronic transport in NW-FETs.

show abstract

Section: A Transport In Sb-nw-fets-off Statesupporting

confidence: 55%

Toward Nanowire Electronics

Appenzeller

Knoch

Björk

et al. 2008

IEEE Trans. Electron Devices

Self Cite

340

232

View full text Add to dashboard Cite

show abstract

“…An excellent agreement is found between the simulated and experimental data, which confirms that decreasing the SOI thickness leads to an increasingly thinner SB and, hence, to an improved carrier injection into the channel of SOI SB-MOSFETs. Note that increasing the SOI thickness beyond d soi > 1.5 × λ, i.e., if d soi > 4.5 × d ox , the bulk limit is reached, and the inverse subthreshold slope in this case remains at a constant, rather large value [18].…”

Section: S Dependence On the Soi Thickness-comparison Of Thementioning

confidence: 98%

“…It usually varies between 1.0 and 1.3; in the following, we set η = 1.3. Recently, we were able to show that (1) describes well the electrostatics of fully depleted SOI SB-MOSFETs if d soi /λ ≤ 1.5 [18]. The effect of an energetic separation ∆E of the first subband due to vertical quantization is taken into account in the simulations as well.…”

Section: S Dependence On the Soi Thickness-comparison Of Thementioning

confidence: 99%

On the performance of single-gated ultrathin-body SOI Schottky-barrier MOSFETs

Knoch¹,

Zhang²,

Mantl³

et al. 2006

IEEE Trans. Electron Devices

Self Cite

View full text Add to dashboard Cite

Abstract-The authors study the dependence of the performance of silicon-on-insulator (SOI) Schottky-barrier (SB) MOSFETs on the SOI body thickness and show a performance improvement for decreasing SOI thickness. The inverse subthreshold slopes S extracted from the experiments are compared with simulations and an analytical approximation. Excellent agreement between experiment, simulation, and analytical approximation is found, which shows that S scales approximately as the square root of the gate oxide and the SOI thickness. In addition, the authors study the impact of the SOI thickness on the variation of the threshold voltage V th of SOI SB-MOSFETs and find a nonmonotonic behavior of V th . The results show that to avoid large threshold voltage variations and achieve high-performance devices, the gate oxide thickness should be as small as possible, and the SOI thickness should be ∼ 3 nm.Index Terms-Carrier injection, Schottky-barrier MOSFET, threshold voltage shift, ultrathin body SOI.

show abstract

“…As, 2keV dose : 1x10 cm 12 Therefore, it is advantageous from a device point of view to choose a high implantation dose.…”

Section: Dependence Of the Dopant Slope On Implantation Dosementioning

confidence: 99%

“…4 Therefore, much work was devoted to lower the SB height ͑SBH͒ by using silicides with lower ⌽ B 5,6 or dopant segregation [7][8][9][10] and to improve the carrier injection into the channel by using thin gate oxides and thin-body silicon-on-insulator ͑SOI͒. 11,12 Recently, short-channel p-type SB-FETs with NiSi and PtSi contacts and boron dopant segregation have been demonstrated that show oncurrents comparable to conventional unstrained SOI FETs. 13,14 Traditionally, an Ohmic contact between a semiconductor and a metal is formed by highly doping the semiconductor.…”

Section: Introductionmentioning

confidence: 99%

Formation of steep, low Schottky-barrier contacts by dopant segregation during nickel silicidation

Feste

Knoch

Buca

et al. 2010

Journal of Applied Physics

Self Cite

View full text Add to dashboard Cite

We present a systematic analysis of arsenic dopant segregation during nickel silicide formation. The slopes and concentrations of the arsenic dopant profiles at the NiSi∕Si interface have been studied as a function of implantation energy, implantation dose, and NiSi thickness. Silicidation induced dopant segregation conserves the dopant slope at the silicide/silicon interface up to NiSi thicknesses of three times the as-implanted peak depth before degrading. Best slopes and highest dopant concentrations are obtained for low implantation energies and thin NiSi layers. We also demonstrate that the steepness of the dopant profile at the NiSi∕Si interface can be significantly improved through a two-step annealing process for NiSi formation. For As, 1keV, 1×1015cm−2, and a 17nm NiSi layer, a NiSi∕Si junction with a dopant slope of 3.2nm/decade has been obtained. An effective Schottky barrier of ΦSB=0.12eV was determined by low temperature measurements of Schottky diodes with 20nm NiSi formed by an optimized annealing process.

show abstract

Improved Carrier Injection in Ultrathin-Body SOI Schottky-Barrier MOSFETs

Cited by 45 publications

References 10 publications

Toward Nanowire Electronics

Toward Nanowire Electronics

On the performance of single-gated ultrathin-body SOI Schottky-barrier MOSFETs

Formation of steep, low Schottky-barrier contacts by dopant segregation during nickel silicidation

Contact Info

Product

Resources

About