2007
DOI: 10.1109/mci.2007.357195
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Implementing Interval Type-2 Fuzzy Processors [Developmental Tools]

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Cited by 76 publications
(20 citation statements)
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“…Although the servo case is relatively slow, all these defuzzification methods can be analyzed and compared. Several studies have been implemented in FPGA hardware for T1FLS [16] and IT2FLS [17]. However, no comparisons have been presented, in hardware terms, where the most important defuzzification methods are applied for solving the same problem.…”
Section: Methodsmentioning
confidence: 99%
“…Although the servo case is relatively slow, all these defuzzification methods can be analyzed and compared. Several studies have been implemented in FPGA hardware for T1FLS [16] and IT2FLS [17]. However, no comparisons have been presented, in hardware terms, where the most important defuzzification methods are applied for solving the same problem.…”
Section: Methodsmentioning
confidence: 99%
“…the uncertainty about different perceptions and concepts. Mendel [15,16,18,21,24,25] and Melgarejo [19,20] provided formal definitions of IT2FS. Figueroa [4,5,6,7] proposed an extension of the FLP which involves linguistic uncertainty using IT2FS called Interval Type-2 Fuzzy Linear Programming (IT2FLP).…”
Section: Interval Type-2 Fuzzy Constraintsmentioning
confidence: 99%
“…Pipelined architecture technique is also popular for achieving higher inferencing performance. A digital fuzzy processor with pipeline hardware architecture is proposed by Melgarejo and Pena-Reyes [13]. Aranguren et al [9] present a 5-level pipeline sequential fuzzy inference processor architecture.…”
Section: Previous Work On Fuzzy Inference Processormentioning
confidence: 99%