Implementing in-situ self-organizing maps with memristor crossbar arrays for data mining and optimization

Abstract

A self-organizing map (SOM) is a powerful unsupervised learning neural network for analyzing high-dimensional data in various applications. However, hardware implementation of SOM is challenging because of the complexity in calculating the similarities and determining neighborhoods. We experimentally demonstrated a memristor-based SOM based on Ta/TaOx/Pt 1T1R chips for the first time, which has advantages in computing speed, throughput, and energy efficiency compared with the CMOS digital counterpart, by utilizing the topological structure of the array and physical laws for computing without complicated circuits. We employed additional rows in the crossbar arrays and identified the best matching units by directly calculating the similarities between the input vectors and the weight matrix in the hardware. Using the memristor-based SOM, we demonstrated data clustering, image processing and solved the traveling salesman problem with much-improved energy efficiency and computing throughput. The physical implementation of SOM in memristor crossbar arrays extends the capability of memristor-based neuromorphic computing systems in machine learning and artificial intelligence.

An Effective Sneak‐Path Solution Based on a Transient‐Relaxation Device

“…The generality of the 1S tr 1R strategy was further demonstrated by integrating the BVMR with another type of non‐MR (Ta–Ta 2 O 5 ) that is also frequently employed for constructing neuromorphic systems. [ 30 ] The integrated 1S tr 1R cell showed successful programmability similar to that in the Ta–HfO 2 ‐based cell (Figure S12, Supporting Information). The results suggest that the 1S tr 1R structure can be broadly applied to various memristors for constructing programmable cells.…”

Technology Roadmap for Flexible Sensors

“…Individual neuromorphic devices when integrated with sensors or embedded with sensing functions can preprocess sensory information in a delocalized manner, providing a promising route to edge computing. When interconnected in large scales, neuromorphic device arrays can be used to implement artificial neural networks more efficiently than conventional processers. , However, much current work only simulates neural networks by extracting device parameters, instead of implementing physical demonstrations of array hardware. , Actual physical implementations face challenges in device yield and consistency, array integration, system robustness, etc .…”

Recent progress in bio-voltage memristors working with ultralow voltage of biological amplitude

“…41 Multistate switching is favored for constructing analog neuromorphic systems. 8,82,83 However, multistate nonvolatile BMRs have rarely been reported. Hu et al, demonstrated threestate nonvolatile BMRs with the 1 st and 2 nd LRS programmed by a V set of 6 mV and 200 mV, respectively.…”