Implementation of Shortest path planning algorithm without track using FPGA robot: A new approach

Chinnaiah, M. C.; Vani, G. Divya; Satyasavithri, T.; Rajeshkumar, P.

doi:10.1109/icaee.2014.6838555

Cited by 9 publications

(3 citation statements)

References 10 publications

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“…In this research work, the usage of landmarks increased the abilities of a robot in knowing its current position and navigate to the intended goal point. Its precision is improved in navigation and device utilization than [6,13]. Its performance is validated by experiments in the defined environment have been done successfully in the laboratory.…”

Section: Discussionmentioning

confidence: 96%

“…The proposed algorithm is carried out on FPGA (Spartan 3E) due to its high features like less power consumption and parallel processing nature [12]. The authors [13] are mentioned the shortest path planning algorithm upto the simulation results. In similar lines Abdelmoula C et al [14] are explained the importance of FPGA's in shortest path planning using Altera's devices.…”

Section: Introductionmentioning

confidence: 99%

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Hardware Efficient Scheme for Indoor Environment Using Grid Mapping

Chinnaiah

Savithri

Kumar³

2015

BJAST

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This paper addresses the mobile robot navigation using grid mapping. The proposal is to introduce dedicated Hardware scheme for robot navigation and it is deployed on Spartan 3E FPGA. The environment is divided into the grids, where landmarks are considered as grid points. Landmarks are RFID tags, among RFID system the reader is placed on the robot and interfaced with FPGA using UART protocol. The proposed path planning is also developed with obstacle avoidance mechanism to overcome the obstacles in robust environment. The robot navigation efficacy improves with the landmarks and hardware scheme. The hardware scheme is developed with NI lab view. Simulation and experimental results are furnished for proposed navigation algorithm in our laboratory. Aim: Navigation of FPGA based Autonomous robot efficiently towards the target using grid mapping technique.

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Section: Discussionmentioning

confidence: 96%

Section: Introductionmentioning

confidence: 99%

Hardware Efficient Scheme for Indoor Environment Using Grid Mapping

Chinnaiah

Savithri

Kumar³

2015

BJAST

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“…Nadav and Katz [15] designed a 2-D/3-D video analysis algorithm to estimate and detect nearby obstacles. Chinnaiah et al [16] de-veloped and FPGA-based implemented an obstacle avoidance algorithm.…”

Section: Related Existing Workmentioning

confidence: 99%

Single-Camera Computer Vision Algorithm for Robot Shortest Path Estimator using morphological structuring element with variable sizes

Hasan¹,

Akhtar²,

Jumaa³

2018

IJET

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The robotic challeng of developing and implementing a shortest-path finding algorithm to reach a destination without bumping into obstacles has been tackled in this paper. The proposed algorithm is utilized a single ceiling fixed camera and based on the mask and robot size with different sizes for dilation mask. The implementation has been successfully produced thirty-three computer vision figures and two comparison tables of simulation results by using morphological structuring element with different sizes. This paper’s proposal of optimal path finding algorithm is effeciently save robot energy in reaching targets.

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Implementation of an FPGA-Based Vision Localization

Lee

Chen

et al. 2015

Advances in Intelligent Systems and Computing

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Implementation of Shortest path planning algorithm without track using FPGA robot: A new approach

Cited by 9 publications

References 10 publications

Hardware Efficient Scheme for Indoor Environment Using Grid Mapping

Hardware Efficient Scheme for Indoor Environment Using Grid Mapping

Single-Camera Computer Vision Algorithm for Robot Shortest Path Estimator using morphological structuring element with variable sizes

Implementation of an FPGA-Based Vision Localization

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