Implementation of SHA-3 Algorithm Based On ARM-11 Processors

Abstract

As the smart era, the use of smart devices is increasing. Smart devices are widely used to provide a human convenience, but there is a risk that information is exposed. The smart devices to prevent this problem includes the encryption algorithm. Among them, The hash function is an encryption algorithm that is used essentially to carry out the algorithm, such as data integrity, authentication, signature. As the issue raised in the collision resistance of SHA-1 has recently been causing a safety problem, and SHA-1 hash function based on the current standard of SHA-2 would also be a problem in the near future safety. Accordingly, NIST selected KECCAK algorithm as SHA-3, it has become necessary to implement this in various environments for this algorithm. In this paper, implementation of KECCAK algorithm. And SHA-2 On The ARM-11 processor, and compare performance.

Chaining Optimization Methodology: A New SHA-3 Implementation on Low-End Microcontrollers

“…It is widely known that the hardware implementation of SHA-3 has the advantage of faster execution than that of SHA-1 and SHA-2 [32]. However, with respect to software implementation, SHA-3 is much slower than existing hash algorithm including SHA-2 [13][14][15][16][17]. Currently, existing SHA-3 software on a variety of IoT devices, including 8-bit AVR MCUs, are implemented according to the pseudo-codes of the NIST SHA-3 standard [13][14][15][16].…”

“…However, with respect to software implementation, SHA-3 is much slower than existing hash algorithm including SHA-2 [13][14][15][16][17]. Currently, existing SHA-3 software on a variety of IoT devices, including 8-bit AVR MCUs, are implemented according to the pseudo-codes of the NIST SHA-3 standard [13][14][15][16]. The existing implementations following the pseudo-codes of the standard compute π and ρ in the combined way as π ∼ ρ rather than computing them separately, because rotate-operation (ρ) can be embedded in the process of π computation.…”

“…Through lines 2-9 in Algorithm 3, load one lane to R8-R15 registers and return the address value of the X register through lines 10 and 11. Similar to line 1, line 12 adds offset value to the X register to determine the i value of D[i, z] and then lines [13][14][15][16][17][18][19][20][21][22][23][24][25][26][27]…”

“…Until now, researchers had examined the security of SHA-3 (Keccak). While SHA-3 is proven to be secure against known attacks, its usage is limited due to its inefficiency [13][14][15][16][17][18][19][20]. It is known that SHA-3 is three times slower than SHA-256 in the 8-bit AVR platform [12,[15][16][17] and two times slower than SHA-512 in a CPU environment [2,[18][19][20].…”