Implementation of PRML in a rigid disk drive

Coker, J.D.; Galbraith, Rick; Kerwin, Gregory; Rae, J.; Ziperovich, P.A.

doi:10.1109/20.278677

Cited by 48 publications

(8 citation statements)

References 5 publications

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“…In the presence of interleaving to a finite depth of symbols (bytes) the sector error rate can be computed by using the union bound, i.e., (8) where…”

Section: B Semianalytic Resultsmentioning

confidence: 99%

“…These codes have been widely used in the disk-drive industry since the introduction of partial response maximum-likelihood sequence detection ten years ago [8], [4]. As these conventional modulation codes do not improve error performance, high code rates and small error bursts at the modulation decoder output are desired to minimize performance degradation due to rate loss and error propagation at the modulation decoder.…”

Section: Introductionmentioning

confidence: 99%

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Noise predictive maximum likelihood detection combined with parity-based post-processing

et al. 2001

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The performance of magnetic recording systems that include conventional modulation codes combined with multiple parity bits is studied. Various performance measures, including bit error rate at the output of the inverse precoder, byte error probability at the input of the Reed-Solomon (RS) decoder and sector error rate, are used to evaluate the performance of various coding/detection schemes. Suboptimum detection/decoding schemes consisting of a 16-state noise-predictive maximum-likelihood (NPML) detector followed by parity-based noise-predictive post-processing, and maximum-likelihood sequence detection/decoding on the combined channel/parity trellis are considered. For conventional modulation codes, it is shown that although the dual-parity post-processor gains 0.5 dB over the single-parity post-processor in terms of bit-and byte-error-rate performance, the sector-error-rate performance of both schemes is almost the same. Furthermore, the sector-error-rate performance of optimum 64-state combined channel/parity detection for the dual-parity code is shown to be approximately 0.1 dB better than that of optimum 32-state combined channel/parity detection for the single-parity code. These performance gains can be even more substantial if appropriate coding techniques that eliminate certain error events and minimize error burst length or multiparity codes in conjunction with combined parity/channel detection are used.Index Terms-Noise-predictive maximum-likelihood detection, noise-predictive post-processing, parity check codes, sector error probability.

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“…In the presence of interleaving to a finite depth of symbols (bytes) the sector error rate can be computed by using the union bound, i.e., (8) where…”

Section: B Semianalytic Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Noise predictive maximum likelihood detection combined with parity-based post-processing

et al. 2001

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“…It is significant for recording systems where the recording head is made with high inductance materials such as a Ferrite or an MIG (metal in gap) head. To compensate for this nonlinear effect, a write driver with a fast write current risetime or a precompensation write circuit have been used, as described in [17]- [20]. This nonlinear effect and the nonlinear effect due to the demagnetization field of the preceding bit transition are compensated jointly since both mechanisms cause the transition shift earlier and they cannot be separated.…”

Section: Nonlinear Effect Due To Inadequate Write Currentmentioning

confidence: 99%

A class of Schneider write equalizers for a (1,k) peak detection channel

1994

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Schneider write equalization has been proposed in some digital recording systems. In this paper, a class of Schneider write equalizers with zero degree phase shift and with added pulse width equal to T/M (M is an integer greater than 1, M L 2) for the (1, k) peak detection recording channel will be investigated. The effects of the equalizers on the linear peak shift and resolution for (1, 7) RLL sequences will be studied, and the capacity of the equalized recording channel will be compared, under the assumption of an ideal Lorentzian channel model. One of the equalizers with added pulse width T/2 together with a 2/3 (1, 7) RLL code is applied to an R-DAT (rotary head-digital audio tape recorder) and results show improvement in recording density and data transfer rate over an 8/10 (0, 3) dc-free code. This class of equalizer together with a (1, k) RLL sequence can be described as a new modulation sequence and the power spectrum will be computed based on the new modulation sequence. As added pulses of this class of equalizers are very narrow, especially for large M, the linear channel model might not be accurate because of nonlinear distortion due to inadequate write current risetime andfor to the demagnetization field from recorded transitions. Hardware implementations of the equalizers, including compensation for nonlinear effects introduced in the recording process, will be considered.

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“…P ARTIAL-RESPONSE maximum-likelihood (PRML) read channels have been used in hard disk drives since 1990 [1], [2]. PRML was a dramatic departure from the previous peak-detection technology and offered an optimal approach to account for the inter-symbol interference (ISI) present in the signal from the read head.…”

Section: Introductionmentioning

confidence: 99%

Architecture and Implementation of a First-Generation Iterative Detection Read Channel

et al. 2010

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This paper explores the architecture of a first-generation iterative detection read channel solution that delivers up to an 8% increase in drive capacity compared to previous generation electronics. Using low density parity check (LDPC) coding, detected data is continually improved by a detection structure that implements multiple iterations through a set of soft-input soft-output (SISO) and message-passing (MP) blocks. A specially constructed LDPC code is used to optimize performance in the presence of inter-symbol interference (ISI). Also, Reed-Solomon error correction coding (ECC) is retained for optimal data integrity. A 65 nm technology is used in the implementation of this design.

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Implementation of PRML in a rigid disk drive

Cited by 48 publications

References 5 publications

Noise predictive maximum likelihood detection combined with parity-based post-processing

Noise predictive maximum likelihood detection combined with parity-based post-processing

A class of Schneider write equalizers for a (1,k) peak detection channel

Architecture and Implementation of a First-Generation Iterative Detection Read Channel

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