Implementation of Multi-Channel FM Repeater using Digital Signal Processing Algorithm in FPGA

Han, Mangi; Song, Ji Min; Yang, Hoon Gee; Kim, Young‐Min

doi:10.1109/isocc.2018.8649935

Cited by 3 publications

(1 citation statement)

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“…The problem of unstable signal power range [14][15]. In the past, most of the literature was on the automatic gain control algorithm, but the research on the automatic gain control system of the DRU digital domain signal power in the DAS system is relatively lacking [16][17][18][19][20][21]. This paper based on the difference between the uplink and downlink data links in the DRU Among them, the automatic power control (APC) system is researched and optimized, and board-level verification is based on FPGA In order to meet the requirement of no overflow of bit width and stable output power after carrier combining in DRU, this paper controls the power of uplink and downlink of DRU based on FPGA by counting signal power values in different time lengths.…”

Section: Introductionmentioning

confidence: 99%

The application of automatic power control based on FPGA in digital remote unit

Liu¹,

Gao²,

He³

et al. 2023

International Conference on Signal Processing and Communication Technology (SPCT 2022)

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In the indoor distributed antenna system, the uplink and downlink of the digital remote unit combine the multi-carrier and output, and the signal power increases after the combination. When the output power is greater than the maximum limit of the system, it may cause damage to the analog devices in the system and output wrong signals. Since the uplink and downlink are respectively oriented to the digital expansion unit and the RF analog unit, power control needs to be performed for different links respectively. Therefore, an FPGA-based uplink and downlink automatic power control technical scheme is proposed. By counting the digital signal power at different times, a short-time automatic power control module suitable for uplink and a short-time automatic power control module suitable for downlink are designed respectively. Long-time automatic power control module, which effectively solves the problem that the signal power exceeds the system threshold after combining, and ensures that the power of the output signal is basically stable. At the same time, the DSP resources are time-division multiplexed according to the multiple relationship between the sampling rate and the clock frequency, which optimizes the consumption of DSP resources. After simulation and actual test on the board, the results show that the control accuracy of the uplink output power is ≤±0.5dB, and the maximum attenuation of 8dB can be achieved. The downlink output power control accuracy is ≤±1dB, the maximum attenuation is 22dB, and the DSP resource consumption is reduced by 50% after time division multiplexing.

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