2013
DOI: 10.1587/elex.10.20130339
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Implementation of metadata logging and power loss recovery for page-mapping FTL

Abstract: Abstract:In NAND flash systems, the mapping table and related metadata information of FTL should be recovered from sudden power loss to provide data consistency. Nowadays, a lot of FTLs have been reported, however, there are little development reports for FTL recovery schemes. In this paper, we design fast metadata logging and recovery scheme to support efficient and fast power loss recovery. The designed recovery scheme is based on the page-level mapping FTL. In the designed FTL, All the metadata changes are … Show more

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Cited by 8 publications
(8 citation statements)
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“…However, main theme is similar, so the invalidation scheme can be applied in similar manner. In our system, we consider FTL having page-level mapping table management [4], since our implementation is based on page-level mapping management FTL. Generally, mapping table for pagelevel FTL is a large index-based table, where each entry of the table represents physical address of the corresponding logical address.…”
Section: Bitmap-based Discard Managementmentioning
confidence: 99%
See 1 more Smart Citation
“…However, main theme is similar, so the invalidation scheme can be applied in similar manner. In our system, we consider FTL having page-level mapping table management [4], since our implementation is based on page-level mapping management FTL. Generally, mapping table for pagelevel FTL is a large index-based table, where each entry of the table represents physical address of the corresponding logical address.…”
Section: Bitmap-based Discard Managementmentioning
confidence: 99%
“…The GC efficiency is getting higher as the number of data to be copied is getting smaller. The detailed management of FTL is described in [4].…”
Section: Introductionmentioning
confidence: 99%
“…Since FTL management is out of scope of this paper, we omit the specific description of the translation mechanism. Please refer to mapping management and recovery process for page-mapping FTL in [12]. After the FTL translation, the physical address of data is set.…”
Section: In-block Level Redundancy Schemementioning
confidence: 99%
“…The parity recovery process is held at the end of the recovery of FTL map. Although recovery of mapping table of FTL is also omitted in this paper, please refer to the previous work that presents recovery process of page-mapping FTL [12]. At the end of recovery for mapping table, FTL should find out the block at the moment of sudden power off by checking FTL's own mapping management to recover the mapping management of last used block of previous running time.…”
Section: Parity Flush After Last-a Page Is Written To the Flash Memmentioning
confidence: 99%
“…With this composition, the redundancy generation is as follows. When data is arrived from host system, its corresponding address is logical address, so, at first in Storage system, FTL translate logical address to physical address [2,3,8]. Since FTL management is out of scope of this paper, we omit the specific description of the translation mechanism.…”
Section: Introductionmentioning
confidence: 99%