2021
DOI: 10.1002/admt.202100745
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Implementation of Highly Reliable and Energy Efficient in‐Memory Hamming Distance Computations in 1 Kb 1‐Transistor‐1‐Memristor Arrays

Abstract: Highly efficient Hamming distance (HD) computations can significantly boost up modern data‐intensive algorithms. However, the traditional complementary metal–oxide–semiconductor devices configured circuits suffer from the huge power consumption with periphery complexity for HD computations. Herein, the implementation of highly reliable and energy efficient in‐memory HD computations in 1 Kb 1‐transistor‐1‐memristor (1T1M) TiN/HfOx/TaOx/TiN array chip is reported. 1T1M devices demonstrate a high on/off ratio of … Show more

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Cited by 14 publications
(13 citation statements)
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“…To reduce its computational complexity, one notable option is to use in-memory computing that executes searches in an analogue manner. It has recently been shown that the associative memory can be realized by analog in-memory computing based on crossbar arrays of emerging non-volatile memories [36][37][38][39] . Besides improving the computational density and energy efficiency, this paves the way for reducing the computational complexity of the associative memory to O(1).…”
Section: Discussionmentioning
confidence: 99%
“…To reduce its computational complexity, one notable option is to use in-memory computing that executes searches in an analogue manner. It has recently been shown that the associative memory can be realized by analog in-memory computing based on crossbar arrays of emerging non-volatile memories [36][37][38][39] . Besides improving the computational density and energy efficiency, this paves the way for reducing the computational complexity of the associative memory to O(1).…”
Section: Discussionmentioning
confidence: 99%
“…Therefore, realizing OR/NOR IMC result output by V out and V out . Furthermore, based on the output of AND/NAND and OR/NOR, different combinations of logic gates can be used to further implement logic operations such as XOR and XNOR, etc [71].…”
Section: Non-volatile In-memory Computingmentioning
confidence: 99%
“…Emerging nonvolatile memory (eNVM)‐based IMCs, owing to their advantageous energy efficiency and compatibility with CMOS process integration, have been extensively investigated, [ 5–11 ] including resistive RAM (RRAM, a.k.a. memristor), [ 12,13 ] phase‐change memory (PCM), [ 14 ] ferroelectric RAM (FeRAM) or tunnel junction (FTJ), [ 15,16 ] multiferroic material‐based resistive memory, [ 17 ] and spin‐transfer/spin–orbit torque (STT/SOT)‐magnetic random access memory (MRAM). [ 18–20 ] Particularly, SOT‐MRAM is considered as a promising candidate for IMC as it demonstrates competitive switching speeds (subnanosecond, ns) and almost infinite endurance cycles owing to the decoupled write and read paths.…”
Section: Introductionmentioning
confidence: 99%