Implementation of data compression using Huffman coding

Babu, K. Ashok; Kumar, Virendra

doi:10.1109/icm2cs.2010.5706721

Cited by 6 publications

(3 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The Huffman code table and the bit stream of the input source message presented for compression are output. The output data format is one bit per clock cycle, which meets the requirements of most Huffman decoders [8,9].…”

Section: Application In High Rate Serial Data Encodingmentioning

confidence: 99%

Efficient VLSI Huffman encoder implementation and its application in high rate serial data encoding

Wei

Zhang

2017

IEICE Electron. Express

View full text Add to dashboard Cite

Abstract:In this paper, we present a new data structure element for constructing a Huffman tree, and a new algorithm is developed to improve the efficiency of Huffman coding by constructing the Huffman tree synchronously with the generation of codewords. The improved algorithm is adopted in a VLSI architecture for a Huffman encoder. The VLSI implementation is realized using the Verilog hardware description language and simulated by Modelsim. The proposed scheme achieves rapid coding speed with a gate count of 9.962 K using SMIC 0.18 micron standard library cells.

show abstract

Section: Application In High Rate Serial Data Encodingmentioning

confidence: 99%

Efficient VLSI Huffman encoder implementation and its application in high rate serial data encoding

Wei

Zhang

2017

IEICE Electron. Express

View full text Add to dashboard Cite

show abstract

“…In addition, Huffman codes possess the prefix-free property, i.e., no codeword is the prefix of a longer codeword [15]. It can be shown that this property is important for decoding.…”

Section: Data Compressionmentioning

confidence: 99%

“…This new method reduces test-application times and achieves high compression ratios, and also the sizes of the encoded data blocks are made independent of the slice size that can be applied to multiple scan-chain cores has been presented in [14]. An efficient decoder for decompressing the compressed data is implemented using Xilinx and simulated on Active HDL enhances the speed of decoding operation has been presented in [15]. The present paper implements and realizes the high speed Huffman decoder with the concept of multi level Huffman using the multi scan chain method.…”

Section: Introductionmentioning

confidence: 99%

Multi level huffman test data compression with multiple scan chain method

Immareddy¹,

Talusani²

2014

International Conference on Computing and Communication Technologies

View full text Add to dashboard Cite

The present paper focuses on the compression system using Huffman compression algorithm for data compression. The rate of data decompression is more time consuming during the decoding of these compressed data. Various works have proposed for the enhancement of compressed data decoding. In this paper the realization and implementation of a High speed decoding Huffman coding system is proposed and the proposed architecture shows an improvement with respect to the speed of decoding operation based on multiple scan method and multi level decoder partitioning concept. As a apart of the above work the existing Huffman coding system is also implemented and its performance in terms of speed and area are compared with the proposed work.

show abstract