Implementation of D-flipflop using Hybrid Memristor with CMOS Transistor

Abstract

The preamble of the memristor has covered the mode to various inventions. The memristor has a characteristic of non-volatility and it is the nano-scale element which replaces the CMOS transistor. In this work, the sequential element designed with Hybrid CMOS/Memristor technology. The D-flipflop is designed using the memristor with CMOS transistor. Its feature is non-volatile and it performs the analysis is compared with different D-flipflop designs. The proposed D-flipflop is designed with hybrid memristor and CMOS transistors using 90nm technology in cadence virtuoso tool. The simulations are carried out using spectre. The power and delay of the proposed circuit are reduced when compared with existing design and energy consumption is also decreased.