Implementation of a learning Kohonen neuron based on a new multilevel storage technique

Simple intelligent 3-phase power quality detecting framework for microgrid

“…So the Kohonem Learning rule is selected for emphasize the influence of the near period. Equation (1) shows the learning algorithm of current data [6]: (1) In which: ¾ P (n) is the index for 'Recent Power' at time point n. ¾ P (n-1) is the 'Recent Power' at the previous time point. ¾ is the learning rate.…”

A low-power CMOS analog vector quantizer

“…The core of the VQ consists of a 16 16 2-D array of distance estimation cells, configured to interconnect columns and rows according to the vector input components and template outputs. Each cell computes in parallel the absolute difference distance between one component of the input vector and the corresponding component of one of the template vectors (1) The MAD distance between input and template vectors is accumulated along rows (2) and presented to the WTA, which selects the single winner (3) All computations in the VQ processor are performed in parallel, including the distance estimations and the winnertake-all search. It is by now well known that parallel architectures allow energetically more efficient implementation in CMOS for a given computational bandwidth requirement.…”

“…In the evaluate phase, PRE is deactivated, and the minimum values are coupled to the output by activating LO. From (4), the resulting voltage outputs on the floating row lines are given by (5) The last term in (5) corresponds directly to the distance measure in (2). Notice that the negative sign in (5) could be reversed by interchanging clocks HI and LO, if needed.…”

“…Several analog very large scale integration (VLSI) vector quantizers have been developed in recent years, e.g., [2]- [7]. Distinct features of the 16 16 VQ chip presented here include a mean absolute difference (MAD) distance metric and a winner-take-all (WTA) of linear complexity with global positive feedback [6].…”

Neuromorphic Learning VLSI Systems: A Survey

“…The leakage typically resticts the retention time of the memory to the msec range, adequate for short-term storage. An active refresh mechanism is required for long-term storage [50], [63]- [10]. An adaptive element which combines active refresh storage and incremental adaptation, and which allows a random-access read and write digital interface, is described in [the next chapter].…”