Implementation and reliability analysis of a new non‐isolated quadratic buck–boost converter using improved Markov modelling

Abstract

Here, a new buck–boost converter with reliability analysis is proposed. The converter has utilized a new voltage multiplier cell at the input side to boost the output voltage. It has a continuous input current with a wide range of duty cycle operations. The converter achieves unity gain at 26.8% duty cycle and can also operate in continuous and discontinuous conduction modes in buck and boost modes. The detailed reliability analysis of the proposed converter using improved Markov modelling is also presented by considering both open circuit and short circuit faults across the semiconductor devices. The variation of reliability and the mean time to failure (MTTF) with different converter parameters like the duty cycle and the input voltage is also discussed here. The hardware results of the developed prototype converter are also presented here at varying duty ratios. The power loss analysis and comparison of the converter with other newly proposed buck–boost topologies show the advantages of the proposed converter. For checking the stability of the converter, the state space model of the converter is also discussed in detail of the proposed converter.

An ultra‐high voltage gain interleaved converter based on three‐winding coupled inductor with reduced input current ripple for renewable energy applications

“…However, it should be noted that these converters suffer from a poor voltage gain and experience sustained high-voltage stress [9]. Increasing the duty cycle of the power switch is one approach to raise the output voltage; however, this leads to higher conduction losses and a decrease in power efficiency [10]. To tackle this issue, various high-voltage gain converters have been proposed, including approaches such as voltage multiplier cells (VMC), switched capacitors and inductors, magnetically coupled components like coupled inductors and high-frequency transformers, as well as multi-stage topologies [11].…”