Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-Å gate oxide MOSFETs

Ahmed, K.; Ibok, E.; Yeap, Gary; Qi, Xiang; Ogle, B.; Wortman, J. J.; Hauser, John R.

doi:10.1109/16.777153

Cited by 43 publications

(20 citation statements)

References 17 publications

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“…The thickness of thermal SiO 2 was thick enough to allow the tunneling leakage current to be neglected. [36,37]. Frequency dispersion in the SiO 2 capacitor was only observed in samples with small substrate effective areas as depicted in Figure 7a (closed symbols extracted from Figure 3).…”

Section: Resultsmentioning

confidence: 97%

Extrinsic and Intrinsic Frequency Dispersion of High-k Materials in Capacitance-Voltage Measurements

et al. 2012

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In capacitance-voltage (C-V) measurements, frequency dispersion in high-k dielectrics is often observed. The frequency dependence of the dielectric constant (k-value), that is the intrinsic frequency dispersion, could not be assessed before suppressing the effects of extrinsic frequency dispersion, such as the effects of the lossy interfacial layer (between the high-k thin film and silicon substrate) and the parasitic effects. The effect of the lossy interfacial layer on frequency dispersion was investigated and modeled based on a dual frequency technique. The significance of parasitic effects (including series resistance and the back metal contact of the metal-oxide-semiconductor (MOS) capacitor) on frequency dispersion was also studied. The effect of surface roughness on frequency dispersion is also discussed. After taking extrinsic frequency dispersion into account, the relaxation behavior can be modeled using the Curie-von Schweidler (CS) law, the Kohlrausch-Williams-Watts (KWW) relationship and the Havriliak-Negami (HN) relationship. Dielectric relaxation mechanisms are also discussed.

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Section: Resultsmentioning

confidence: 97%

Extrinsic and Intrinsic Frequency Dispersion of High-k Materials in Capacitance-Voltage Measurements

et al. 2012

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“…The reported literature revealed that capacitance roll‐off phenomena in MIS structures are attributed to the tunneling current through very thin oxide layer. The various structures used are n + ‐polysilicon/SiO 2 /Si , Au/Ti/Al 2 O 3 /n‐GaAs , Ti/Al/SiO 2 /p‐Si/Al , etc. In all these structures, the capacitance was found to decrease with applied forward bias.…”

Section: Resultsmentioning

confidence: 99%

Capacitance roll‐off and frequency‐dispersion capacitance–conductance phenomena in field plate and guard ring edge‐terminated Ni/SiO₂/4H‐nSiC Schottky barrier diodes

Kumar

Kaminski

Maan³

et al. 2015

Physica Status Solidi (a)

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In this work, field plate and guard ring edge‐terminated Ni/4H‐nSiC Schottky barrier diodes (SBD) were fabricated using standard photolithography process. Strange peaks in capacitance–conductance curves, capacitance roll‐off, and a high value of ideality factor (η = 1.3) in fabricated SBD were seen as a signature of interface trap states (Nss) at the residual oxide (2.2 nm)/4H‐nSiC interface and series resistance (Rs). Schottky capacitance spectroscopic, High–low capacitance–voltage (C–V) and forward‐bias current–voltage (I–V) techniques, in the frequency range from 100 Hz to 1 MHz, determines Nss of the order of 1012 cm−2 eV−1 and were found exponentially distributed in the bandgap of SiC. Using Hill–Coleman's method, the density Nss was calculated to be 1.15 × 1015 cm−2 eV−1 at 100 Hz and 7.81 × 1012 cm−2 eV−1 at 1 MHz, which explains the larger value of capacitance at low frequencies. Relaxation times and capture cross sections of Nss were also estimated. Calculated values of Nss were used in a Silvaco simulation that emphasize that bulk level defects present in the SiC also contributes in the experimentally observed strange peaks in C–V characteristics of fabricated SBD. At higher current levels, calculated values of Rs (V, f), confirm an increase of leakage current through residual oxide and describes the capacitance roll‐off phenomena in the fabricated SBD.

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“…The actual circuit of the MOS capacitor being measured contains oxide, gate, substrate, and interface state capacitance, tunneling and interface state conductance, and contact resistance [6,7]. A FET is even more complicated since many of the circuit elements are distributed across the channel [8]. To simplify this discussion, a capacitor test structure will be assumed.…”

Section: Equivalent Circuitsmentioning

confidence: 99%

Challenges of Electrical Measurements of Advanced Gate Dielectrics in Metal-Oxide-Semiconductor Devices

Vogel¹,

Brown²

2003

AIP Conference Proceedings

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Experimental measurements and simulations are used to provide an overview of key issues with the electrical characterization of metal-oxide-semiconductor (MOS) devices with ultra-thin oxide and alternate gate dielectrics. Experimental issues associated with the most common electrical characterization method, capacitance-voltage (C-V), are first described. Issues associated with equivalent oxide thickness extraction and comparison, interface state measurement, extrinsic defects, and defect generation are then overviewed.

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Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-Å gate oxide MOSFETs

Cited by 43 publications

References 17 publications

Extrinsic and Intrinsic Frequency Dispersion of High-k Materials in Capacitance-Voltage Measurements

Extrinsic and Intrinsic Frequency Dispersion of High-k Materials in Capacitance-Voltage Measurements

Capacitance roll‐off and frequency‐dispersion capacitance–conductance phenomena in field plate and guard ring edge‐terminated Ni/SiO₂/4H‐nSiC Schottky barrier diodes

Challenges of Electrical Measurements of Advanced Gate Dielectrics in Metal-Oxide-Semiconductor Devices

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Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-Å gate oxide MOSFETs

Cited by 43 publications

References 17 publications

Extrinsic and Intrinsic Frequency Dispersion of High-k Materials in Capacitance-Voltage Measurements

Extrinsic and Intrinsic Frequency Dispersion of High-k Materials in Capacitance-Voltage Measurements

Capacitance roll‐off and frequency‐dispersion capacitance–conductance phenomena in field plate and guard ring edge‐terminated Ni/SiO2/4H‐nSiC Schottky barrier diodes

Challenges of Electrical Measurements of Advanced Gate Dielectrics in Metal-Oxide-Semiconductor Devices

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Capacitance roll‐off and frequency‐dispersion capacitance–conductance phenomena in field plate and guard ring edge‐terminated Ni/SiO₂/4H‐nSiC Schottky barrier diodes