Impact of Transistor Aging on the Reliability of the Analog Circuit

Bhattacharjee, Abhishek; Pradhan, Sambhu Nath

doi:10.1109/compe49325.2020.9200055

Cited by 3 publications

(1 citation statement)

References 11 publications

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“…Semiconductor component ageing can cause serious performance degradation for analogue circuits [9][10][11][12]. Studies have shown that ageing failures considerably affect DACs, which can cause mismatch and integral nonlinearity (INL) gain error, induce non-monotonicity and other problems.…”

Section: Introductionmentioning

confidence: 99%

Self‐healing digital‐to‐analogue converter architecture for communication equipment with ordered element‐matching technology

Chiou

Yang

2021

J. eng.

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An attempt was made to establish self-healing architecture using ordered element-matching (OEM) technology for ageing or partially damaged components of digital-to-analogue converter (DAC) components used in communication equipment. Using OEM technology, damaged DAC components, such as memory cells, current cells and current cell control switches, can be healed. The performance before and after healing is compared in this work. The simulation results prove the feasibility of using the proposed technology to heal the DAC almost to achieve the original performance. JEL CLASSIFICATION Circuits, devices and systems 1This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

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Section: Introductionmentioning

confidence: 99%

Self‐healing digital‐to‐analogue converter architecture for communication equipment with ordered element‐matching technology

Chiou

Yang

2021

J. eng.

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Lookup table‐based negative‐bias temperature instability effect and leakage power co‐optimization using genetic algorithm approach

Bhattacharjee

Sahu

Pradhan

2021

Circuit Theory & Apps

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SummaryAs a result of continuous scaling of transistors, negative bias temperature instability (NBTI) has become a serious reliability concern which causes the device to degrade over its lifetime. Similarly, leakage power also remains a key issue in deep submicron technologies. Both NBTI‐related delay degradation and standby time leakage power depend strongly on the circuit's input patterns. The input vector control (IVC) technique can be used for mitigating both NBTI‐related delay degradation and leakage power. However, the input vectors with the least NBTI‐induced degradation may not be the same ones with the least leakage power in any circuit; therefore, co‐optimization is needed to minimize leakage and NBTI‐induced degradation. In this paper, a genetic algorithm (GA)‐based approach is presented to co‐optimize both NBTI‐related performance degradation and also leakage power. We are also presenting a trade‐off analysis by giving different weightage to the NBTI effect and leakage power. Simulation results applied on ISCAS'85 benchmark circuits illustrate that on average our proposed technique saves up to 21.85% and 17.68% circuit performance degradation and the leakage power, respectively.

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Analysis and Effects of Aging and Electromigration on Mixed-Signal ICs in 22nm FDSOI Technology

Sharara

Navidi

Maharmeh

et al. 2022

2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS)

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Impact of Transistor Aging on the Reliability of the Analog Circuit

Cited by 3 publications

References 11 publications

Self‐healing digital‐to‐analogue converter architecture for communication equipment with ordered element‐matching technology

Self‐healing digital‐to‐analogue converter architecture for communication equipment with ordered element‐matching technology

Lookup table‐based negative‐bias temperature instability effect and leakage power co‐optimization using genetic algorithm approach

Analysis and Effects of Aging and Electromigration on Mixed-Signal ICs in 22nm FDSOI Technology

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