Impact of the Ohmic Electrode on the Endurance of Oxide-Based Resistive Switching Memory

Wiefels, Stefan; Witzleben, Moritz von; Huttemann, Michael; Böttger, U.; Waser, Rainer; Menzel, Stephan

doi:10.1109/ted.2021.3049765

Cited by 29 publications

(31 citation statements)

References 28 publications

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“…In other cases, we recommend optimizing the switching parameters by adaptive programming for each tested stack (or even for each device) and comparing the optimized endurance. A respective algorithm has been demonstrated …”

Section: Discussion and Prospectsmentioning

confidence: 99%

Standards for the Characterization of Endurance in Resistive Switching Devices

et al. 2021

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Resistive switching (RS) devices are emerging electronic components that could have applications in multiple types of integrated circuits, including electronic memories, true random number generators, radiofrequency switches, neuromorphic vision sensors, and artificial neural networks. The main factor hindering the massive employment of RS devices in commercial circuits is related to variability and reliability issues, which are usually evaluated through switching endurance tests. However, we note that most studies that claimed high endurances >106 cycles were based on resistance versus cycle plots that contain very few data points (in many cases even <20), and which are collected in only one device. We recommend not to use such a characterization method because it is highly inaccurate and unreliable (i.e., it cannot reliably demonstrate that the device effectively switches in every cycle and it ignores cycle-to-cycle and device-to-device variability). This has created a blurry vision of the real performance of RS devices and in many cases has exaggerated their potential. This article proposes and describes a method for the correct characterization of switching endurance in RS devices; this method aims to construct endurance plots showing one data point per cycle and resistive state and combine data from multiple devices. Adopting this recommended method should result in more reliable literature in the field of RS technologies, which should accelerate their integration in commercial products.

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Section: Discussion and Prospectsmentioning

confidence: 99%

Standards for the Characterization of Endurance in Resistive Switching Devices

et al. 2021

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“…[18,24,27,32] In VCM cells, significant progress has also been made regarding the understanding of oxygen vacancy defect formation, migration [15,33] and cell switching stability. [34,35] Multiple approaches such as selecting ohmic electrode material with proper defect formation energy, [36,37] applying multilayer oxides, [21,38,39] have been attempted to improve cell performance. However, in most of the reported works, the conclusions were drawn based on studies containing only one type of variable, either the specie of active (ohmic) electrode material, or the counter (bottom) electrode material, overlooking the comprehensive analysis considering the configuration/combination of the electrode/electrolyte materials as a system.…”

Section: Introductionmentioning

confidence: 99%

Design of Materials Configuration for Optimizing Redox‐Based Resistive Switching Memories

Chen

Valov

2021

Advanced Materials

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random access memory (DRAM) and flash memory are reaching the physical scaling limits. To tackle this problem, emerging memory technologies have been proposed during last years. [8][9][10] Among them, redoxbased resistive random access memories (ReRAMs) have received special attention for its CMOS-compatible fabrication, performance, multi-functionality and scaling potential. [1,11,12] It is recognized important building block for next generation storage memories, computation-in-memory architecture and artificial intelligence. [3,8,[10][11][12] ReRAM is a two-terminal metal-insulatormetal cell. The electrical conductivity of the insulating layer, typically a transition metal oxide, can be tuned by ionic modulation, caused by external electrical stimulation. [11] The oxide film has the ability to conduct ions such as metal cation, protonic charge and oxygen ions/vacancies, therefore it is often referred to as solid electrolyte. [13][14][15] Depending on the functional principles, two type ReRAMs are particularly promising-electrochemical metallization memory (ECM) and valencechange memory (VCM). [11,16,17] The resistive switching in ECM cells relies on a metallic filament that forms, and respectively dissolves, between the active electrode and counter electrode. [16] The formation of filament corresponds to a SET process, during which the cell switches from high resistive state (HRS) to low resistive state (LRS). The SET process is accompanied by multiple individual electrochemical processes, i.e., ionization (oxidation) of active electrode, diffusion of metal cation in the oxide electrolyte and nucleation/growth at counter electrode. The application of reverse potential switches the cell back to HRS by oxidizing/dissolving the filament, resulting in a RESET process. Electrochemically active metals, such as Ag, Cu, or their alloys/ compounds are typically employed as active electrodes. [13,18,19] The counter electrode is made by inert materials like Pt, Ir or compounds such as TiN. [18][19][20] VCM cells consist of bottom electrode with high work function (e.g., Pt, TiN) which forms a Schottky interface with the oxide. The top electrode is electrochemically active, typically metal with high oxygen affinity (e.g., Ta, Ti, Hf) which allows redox reactions/ion exchange and forms an ohmic contact to the oxide, favoring the oxygen vacancy defect formation. [21,22] It is widely accepted that the resistive switching for VCM cell is achieved by modulating the electrostatic barrier at Schottky interface by migration and redistribution of oxygen vacancy defects. [11,23] Redox-based resistive random access memories (ReRAMs) are based on electrochemical processes of oxidation and reduction within the devices. The selection of materials and material combinations strongly influence the related nanoscale processes, playing a crucial role in resistive switching properties and functionalities. To date, however, comprehensive studies on device design accounting for a combination of factors such as electrodes, electrolytes, and capp...

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“…Another aspect of the unipolar SET is that it might limit the endurance of VCM based devices. During endurance measurements on ZrO x and TaO x -based devices, with very similar device fabrication, we observed that the devices were usually trapped in the LRS [54,67], which might have been triggered by a unipolar SET event. An exemplary endurance measurement from [54], during which a ZrO x -based device got trapped in the LRS is shown in Fig.…”

Section: Discussionmentioning

confidence: 82%

“…Further information are given in the methods section. In recent publications, we have shown that devices with these material stacks have an endurance of at least 10 6 cycles [53,54]. Read operations are indicated in blue, SET operations in green and RESET operations in red.…”

Section: Reset Kineticsmentioning

confidence: 99%

Intrinsic RESET speed limit of valence change memories

von Witzleben,

Wiefels,

Kindsmüller

et al. 2021

Preprint

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During the last decade, valence change memory (VCM) has been extensively studied due to its promising features, such as a high endurance and fast switching times. The information is stored in a high resistive state (logcial '0', HRS) and a low resistive state (logcial '1', LRS). It can also be operated in two different writing schemes, namely a unipolar switching mode (LRS and HRS are written at the same voltage polarity) and a bipolar switching mode (LRS and HRS are written at opposite voltage polarities). VCM, however, still suffers from a large variability during writing operations and also faults occur, which are not yet fully understood and, therefore, require a better understanding of the underlying fault mechanisms. In this study, a new intrinsic failure mechanism is identified, which prohibits RESET times (transition from LRS to HRS) faster than 400 ps and possibly also limits the endurance. We demonstrate this RESET speed limitation by measuring the RESET kinetics of two valence change memory devices (namely Pt/TaOx/Ta and Pt/ZrOx/Ta) in the time regime from 50 ns to 50 ps, corresponding to the fastest writing time reported for VCM. Faster RESET times were achieved by increasing the applied pulse voltage. Above a voltage threshold it was, however, no longer possible to reset both types of devices. Instead a unipolar SET (transition from HRS to LRS) event occurred, preventing faster RESET times. The occurrence of the unipolar SET is attributed to an oxygen exchange at the interface to the Pt electrode, which can be suppressed by introducing an oxygen blocking layer at this interface, which also allowed for 50 ps fast RESET times.

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Impact of the Ohmic Electrode on the Endurance of Oxide-Based Resistive Switching Memory

Cited by 29 publications

References 28 publications

Standards for the Characterization of Endurance in Resistive Switching Devices

Standards for the Characterization of Endurance in Resistive Switching Devices

Design of Materials Configuration for Optimizing Redox‐Based Resistive Switching Memories

Intrinsic RESET speed limit of valence change memories

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