SET has become the main concern of radiation effect researchers as technology scales down and increasing sensitivity of modern integrated circuits. Transient response induced by heavy-ion, especially the impact of parasitic bipolar amplification in both the NMOS transistor and the CMOS inverter, is investigated in this paper. The bipolar effect of the bulk NMOS transistor has been studied through transient current measurements by using 3-D simulation. The simulation of a 3-D structure has confirmed the enhancement effect due to the bipolar-like structure inherent to the NMOS transistor. With regard to the CMOS inverter, waveforms of transient voltage pulse are fully measured via 2-D mixed-mode simulation. In addition, the impact of LET on transient voltage pulse amplitude and width is analyzed; also, the effect of load capacitance on voltage pulse amplitude is discussed as well. The 2-D mixed-mode simulation results indicate that SET pulse amplitude increases with the value of LET due to enhancement of drift, while SET pulse width increases with the LET for the reason of more significant parasitic bipolar amplification effect. In addition, SET pulse amplitude increases monotonically with the load capacitance. This paper further investigates the bipolar amplification mechanism in bulk MOSFET and analyzes the variation of transient voltage pulse in different conditions in deep submicron device. KEYWORDS bipolar amplification, charge collection, single event transient, TCAD simulation
INTRODUCTIONGenerated electron-hole pairs can cause a transient pulse that may alter the logical state of the struck circuit node when an energetic particle strikes a sensitive region in a semiconductor device. 1 As technology scales down and increasing sensitivity of modern integrated circuits, the SET has become the important research focus for radiation effect. 2,3 SET voltage pulse, which is a momentary voltage perturbation observed in a circuit node when an energetic particle like a heavy ion strikes circuits, becomes a dominant single event soft error phenomenon. 4 The major factors that determine the SET induced soft error are SET pulse amplitude and SET pulse width. Previous work 5 has shown the impact of single event transient pulse duration on SET mitigation techniques.Charge collection in the drain of the transistor is the main reason of SET current generation. To reveal physical mechanisms and to develop device/process-level mitigation techniques, researchers have meticulously measured and simulated heavy-ion-induced or pulsed laser-induced transient currents in a single MOSFET. 6-10 Physical compact model has been developed to describe the transient current pulse which appears at the electrods of a bulk MOSFET. 11 Recent work has shown parasitic bipolar amplification to be a major charge collection effect for SET current and voltage pulses. 12,13 In addition, there are some investigations indicating that bipolar amplification is more significant in PMOS than in NMOS. 14 The recent researches have also showed that the ma...
