Impact of Fin Width on Low-Frequency Noise in AlGaN/GaN FinFETs: Evidence for Bulk Conduction

Im, Ki‐Sik

doi:10.1109/access.2023.3240409

Cited by 6 publications

(3 citation statements)

References 25 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…For example, nanowires can significantly shrink field-effect transistor (FET) geometries. As with FET, Fin-FET, tri-gate, omega gate, and gate-all-around (GAA) or wrap-gate (WG) devices, the scaling of various transistor types depends on geometries [ 13 , 14 , 15 , 16 , 17 , 18 , 19 , 20 , 21 ]. Due to their superior electrostatic controls, WG-based devices produce exceptionally impressive results when compared to alternative architectures.…”

Section: Introductionmentioning

confidence: 99%

Temperature-Dependent Carrier Transport in GaN Nanowire Wrap-Gate Transistor

et al. 2023

Self Cite

View full text Add to dashboard Cite

For the creation of next-generation nanoscale devices, it is crucial to comprehend the carrier transport mechanisms in nanowires. Here, we examine how temperature affects the properties of GaN nanowire wrap-gate transistors (WGTs), which are made via a top-down technique. The predicted conductance in this transistor remains essentially unaltered up to a temperature of 240 K and then increases after that as the temperature rises. This is true for increasing temperature at gate voltages less than threshold voltage (Vgs < Vth). Sharp fluctuations happen when the temperature rises with a gate voltage of Vth < Vgs < VFB. The conductance steadily decreases with increasing temperature after increasing the gate bias to Vgs > VFB. These phenomena are possibly attributed to phonon and impurity scattering processes occurring on the surface or core of GaN nanowires.

show abstract

Section: Introductionmentioning

confidence: 99%

Temperature-Dependent Carrier Transport in GaN Nanowire Wrap-Gate Transistor

et al. 2023

Self Cite

View full text Add to dashboard Cite

show abstract

“…Nanoscale circuit components such as solid-state nanowires have significantly advanced because of their prospective use in future-generation, high-performance electronic and optoelectronic appliances [ 1 , 2 , 3 , 4 , 5 , 6 , 7 ]. Nanowire-based technologies for developing wrap-gate transistors (WGTs) have been demonstrated effectively compared to conventional field-effect transistors (FETs) [ 8 , 9 , 10 , 11 ]. Investigations have also been conducted on nanowire WGTs produced through a top-down fabrication method using a sacrificial layer contrary to the bottom-up method.…”

Section: Introductionmentioning

confidence: 99%

Carrier Trap and Their Effects on the Surface and Core of AlGaN/GaN Nanowire Wrap-Gate Transistor

et al. 2023

Self Cite

View full text Add to dashboard Cite

We used capacitance–voltage (C–V), conductance–voltage (G–V), and noise measurements to examine the carrier trap mechanisms at the surface/core of an AlGaN/GaN nanowire wrap-gate transistor (WGT). When the frequency is increased, the predicted surface trap density promptly drops, with values ranging from 9.1 × 1013 eV−1∙cm−2 at 1 kHz to 1.2 × 1011 eV−1∙cm−2 at 1 MHz. The power spectral density exhibits 1/f-noise behavior in the barrier accumulation area and rises with gate bias, according to the 1/f-noise features. At lower frequencies, the device exhibits 1/f-noise behavior, while beyond 1 kHz, it exhibits 1/f2-noise behavior. Additionally, when the fabricated device governs in the deep-subthreshold regime, the cutoff frequency for the 1/f2-noise features moves to the subordinated frequency (~102 Hz) side.

show abstract

“…The semiconductor-based nanowires have been significantly explored because of their most promising applications for next-generation high-quality optoelectronic/electronic devices [1][2][3]. The scaling of numerous transistor types is based on geometries as in Fin-FET, omega gate, tri-gate, and wrap-gate (WG) or gate-all-around (GAA) devices [4][5][6][7][8][9][10][11]. WG-based devices contribute particularly remarkable performance advantages over other geometries because of their extreme electrostatic controls.…”

Section: Introductionmentioning

confidence: 99%

Barrier Height, Ideality Factor and Role of Inhomogeneities at the AlGaN/GaN Interface in GaN Nanowire Wrap-Gate Transistor

Mallem,

Puneetha,

Choi

et al. 2023

Nanomaterials

Self Cite

View full text Add to dashboard Cite

It is essential to understand the barrier height, ideality factor, and role of inhomogeneities at the metal/semiconductor interfaces in nanowires for the development of next generation nanoscale devices. Here, we investigate the drain current (Ids)–gate voltage (Vgs) characteristics of GaN nanowire wrap-gate transistors (WGTs) for various gate potentials in the wide temperature range of 130–310 K. An anomalous reduction in the experimental barrier height and rise in the ideality factor with reducing the temperature have been perceived. It is noteworthy that the variations in barrier height and ideality factor are attributed to the spatial barrier inhomogeneities at the AlGaN/GaN interface in the GaN nanowire WGTs by assuming a double Gaussian distribution of barrier heights at 310–190 K (distribution 1) and 190–130 K (distribution 2). The standard deviation for distribution 2 is lower than that of distribution 1, which suggests that distribution 2 reflects more homogeneity at the AlGaN/GaN interface in the transistor’s source/drain regions than distribution 1.

show abstract

Impact of Fin Width on Low-Frequency Noise in AlGaN/GaN FinFETs: Evidence for Bulk Conduction

Cited by 6 publications

References 25 publications

Temperature-Dependent Carrier Transport in GaN Nanowire Wrap-Gate Transistor

Temperature-Dependent Carrier Transport in GaN Nanowire Wrap-Gate Transistor

Carrier Trap and Their Effects on the Surface and Core of AlGaN/GaN Nanowire Wrap-Gate Transistor

Barrier Height, Ideality Factor and Role of Inhomogeneities at the AlGaN/GaN Interface in GaN Nanowire Wrap-Gate Transistor

Contact Info

Product

Resources

About