Impact of electrostatic doping on carrier concentration and mobility in InAs nanowires

Abstract

We fabricate dual-gated electric double layer (EDL) field effect transistors based on InAs nanowires gated with an ionic liquid, and we perform electrical transport measurements in the temperature range from room temperature to 4.2 K. By adjusting the spatial distribution of ions inside the ionic liquid employed as gate dielectric, we electrostatically induce doping in the nanostructures under analysis. We extract low-temperature carrier concentration and mobility in very different doping regimes from the analysis of current–voltage characteristics and transconductances measured exploiting global back-gating. In the liquid gate voltage interval from −2 to 2 V, carrier concentration can be enhanced up to two orders of magnitude. Meanwhile, the effect of the ionic accumulation on the nanowire surface turns out to be detrimental to the electron mobility of the semiconductor nanostructure: the electron mobility is quenched irrespectively to the sign of the accumulated ionic species. The reported results shine light on the effective impact on crucial transport parameters of EDL gating in semiconductor nanodevices and they should be considered when designing experiments in which electrostatic doping of semiconductor nanostructures via electrolyte gating is involved.

Surface Nano-Patterning for the Bottom-Up Growth of III-V Semiconductor Nanowire Ordered Arrays

“…Single electron transistors made of axial InAs/InP nanowire heterostructures (quantum dots) [ 47 , 48 ], axial and radial NW heterostructures applied to solar cells [ 16 ] and other core-shell devices [ 49 , 50 ], light emitting diodes [ 51 ], lasers [ 52 ], photodetectors [ 53 , 54 ], thermoelectric devices [ 55 , 56 ], sensors [ 57 ], spin based quantum systems [ 58 , 59 , 60 ], topological qubits based on Majorana physics [ 61 , 62 ], and many others have been reported. Moreover, homogeneous nanowires and heterostructured nanowires are widely employed as test-bed platforms for investigating basic physics phenomena, including properties of materials [ 63 , 64 , 65 ], ion gating mechanisms [ 66 , 67 , 68 , 69 ], advanced quantum concepts [ 45 ], hybrid semiconductor-superconductors systems [ 70 , 71 ], etc.…”

Buried graphene heterostructures for electrostatic doping of low-dimensional materials

“…An alternative to provide a semiconductor with a high electron or hole density is electrostatic doping via mutually insulated gate electrodes [19,20]. This allows for individually controllable potentials along a semiconductor channel region, which enables the fabrication of reconfigurable transistors [21][22][23].…”

Measuring thermal conductivity of nanostructures with the 3ω method: the need for finite element modeling

“…The thermoelectric performance of a specimen can be shown to depend on an adimensional quantity, named the thermoelectric figure of merit, which depends on the ratio between the electric and thermal conductivity of the material chosen for the thermoelectric device. The recently-demonstrated ability to engineer semiconducting nanowires (NWs) to lower their thermal conductivity without affecting their electrical transport properties [1][2][3][4][5][6][7]-a promising feature coming from phonon scattering with the boundaries of the nanostructure, i.e. the Casimir effect [8]-has made them an extremely interesting platform to realize high room-temperature figures of merit, to rival those of more-established industry standard thermoelectric materials (e.g.…”