2020 Progress in Applied Electrical Engineering (PAEE) 2020
DOI: 10.1109/paee50669.2020.9158727
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Impact of a gate drive on performance of three-phase inverters based on 3.3 kV SiC MOSFETs

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“…To avoid high propagation delays, the main control unit of the AGD in this paper was based on a CPLD; alas, it made the whole device more complex. A multi-level gate voltage method for a 3.3 kV/450 A SiC MOSFET in open loop was described in [16]. This method was verified in a double-pulse test (DPT) and in a half-bridge inverter.…”
Section: Introductionmentioning
confidence: 99%
“…To avoid high propagation delays, the main control unit of the AGD in this paper was based on a CPLD; alas, it made the whole device more complex. A multi-level gate voltage method for a 3.3 kV/450 A SiC MOSFET in open loop was described in [16]. This method was verified in a double-pulse test (DPT) and in a half-bridge inverter.…”
Section: Introductionmentioning
confidence: 99%