ILAng: A Modeling and Verification Platform for SoCs Using Instruction-Level Abstractions

Huang, Bo; Zhang, Hongce; Gupta, Aarti; Malik, Sharad

doi:10.1007/978-3-030-17462-0_21

Cited by 9 publications

(3 citation statements)

References 9 publications

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“…The D2A methodology also supports checking VT1-3 through simulation-based validation. This is highly automated as the ILAng platform [35] can automatically generate an executable software model (in C++/SystemC) of a program of ILA instructions. These executable models capture the precise definitions of the numerics used by the accelerator.…”

Section: Ila-based Compilation-results Validationmentioning

confidence: 99%

“…For instruction selection, it leverages the rewrite rules and the equality saturation engine provided by Glenside and egg [68,83]. The ILA-models of accelerators, the validation of IR-accelerator mappings, and compilation-results validation at the application level are powered by ILA-based methods in ILAng [35].…”

Section: Rewrite Rulesmentioning

confidence: 99%

“…ILAng, an open-source platform for ILA-based modeling and verification, for developing the ILA models and performing ILA-based verification/validation [35]. ILAng provides support for the following capabilities:…”

Section: Ila Modeling and Correctness Verification We Utilizementioning

confidence: 99%

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Specialized Accelerators and Compiler Flows: Replacing Accelerator APIs with a Formal Software/Hardware Interface

Huang¹,

Lyubomirsky²,

Li³

et al. 2022

Preprint

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Specialized accelerators are increasingly used to meet the power-performance goals of emerging applications such as machine learning, image processing, and graph analysis. Existing accelerator programming methodologies using APIs have several limitations: (1) The application code lacks portability to other platforms and compiler frameworks; (2) the lack of integration of accelerator code in the compiler limits useful optimizations such as instruction selection and operator fusion; and (3) the opacity of the accelerator function semantics limits the ability to check the final code for correctness. The root of these limitations is the lack of a formal software/hardware interface specification for accelerators.In this paper we use the recently developed Instruction-Level Abstraction (ILA) for accelerators to serve this purpose, similar to how the Instruction Set Architecture (ISA) has been used as the software/hardware interface for processors. We propose a compiler flow termed D2A using the ILA and present a prototype that demonstrates this flow for deep learning (DL) applications. This prototype compiles programs from high-level domain-specific languages, e.g., PyTorch and MxNet, to multiple target accelerators with no target-specific extensions to the application or compilerthus demonstrating application portability. It includes compiler optimizations through instruction selection using equality saturation-based flexible matching. Finally, we demonstrate checking the correctness of the resulting code through both formal verification of individual matched operations, as well as fully automated simulation-based validation of complete applications. The evaluation of the prototype compiler is based on six different DL applications and three different accelerators. Overall, this methodology lays the foundation * Equal contribution arXiv, 2022, USA 2022.for integrating accelerators in compiler flows using a formal software/hardware interface.

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Section: Ila-based Compilation-results Validationmentioning

confidence: 99%