Proceedings of 2010 International Symposium on VLSI Technology, System and Application 2010
DOI: 10.1109/vtsa.2010.5488912
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Identification and application of current compliance failure phenomenon in RRAM device

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Cited by 9 publications
(6 citation statements)
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“…The function of the top and bottom MLG stacks is to reduce atomic species exchange between the h-BN and the adjacent Ti (top) and Au (bottom) electrodes. Despite graphene is an excellent impermeable barrier, atomic exchange through the local defects of the MLG sheets (mainly GBs in the CVD-grown sheet) is possible [58,59]. From an RRAM point of view, this reduces the number of CFs in the device, leading to lower cur rents and cycleto-cycle variability.…”
Section: Methodsmentioning
confidence: 99%
“…The function of the top and bottom MLG stacks is to reduce atomic species exchange between the h-BN and the adjacent Ti (top) and Au (bottom) electrodes. Despite graphene is an excellent impermeable barrier, atomic exchange through the local defects of the MLG sheets (mainly GBs in the CVD-grown sheet) is possible [58,59]. From an RRAM point of view, this reduces the number of CFs in the device, leading to lower cur rents and cycleto-cycle variability.…”
Section: Methodsmentioning
confidence: 99%
“…As result of reducing redundant CFs inside TMO layer, larger portion of trimmed cells are showing Type A, evidence to less CFs. Besides, as shown in Figure 13(b), sharply current drops during reset process are also obtained in trimmed cells after minimizing redundant tiny paths [46]- [48]. As further demonstrated timing required of first reset operations in Figure 13(c), faster reset speed is obtained after the reset trimming treatment.…”
Section: Reset Trimming Schemementioning
confidence: 64%
“…However, no switch in time constants and 2 N current states of Type C, shown in Figure 4(a) and (c), contradict with findings in presented studies. Data in Figure 6 show that gradual reset transitions in Type B and Type C can be fully explained by existence of multiple CFs instead of multiple traps [46]- [48]. Type C cell is believed that includes multiple CFs with interactive processes between the trap states, where Vo can capture/emission electron from/to more than one conductive path, leading to irregular LFNs.…”
Section: Reset Speed Variation In Bcrram Arraymentioning
confidence: 99%
“…Most of these memory candidates exhibit bi-polar switching, i.e., the switching behaviour depends on the polarity of applied electric field or current, primarily because of some spatial asymmetry in the device or material structure [104]. Also, for many device candidates, the magnitude of the on-state resistance is determined by the compliance limit of the programming current [47], but there are exceptions to this as well [113]. Most devices in the RRAM family require a forming process, where a substantially different programming condition is first applied to an as-fabricated device, before it exhibits memory switching effects [215].…”
Section: Resistive Rammentioning
confidence: 99%