IC failure analysis: the importance of test and diagnostics

Abstract

DEVELOPMENT AND MANUFACTURING failures are unfortunately an inherent part of the microelectronics business, where complexity is growing rapidly. Failures can occur during several points of a product's life cycle, such as technology or product development and qualification, yield learning, reliability improvement, system manufacture, and field application. The impact of such failures ranges from consequential to catastrophic. While we expect failures during reliability stressing or yield learning on a new technology, mature programs and parts qualified for sale and field application demand competitive quality and reliability levels. Failures during these later phases of production need immediate analysis and corrective action. Whether anticipated or sudden, failures can have a severe business impact. Because narrow market opportunities often drive shortened product cycles, companies need to understand failures and take corrective actions quickly. Electrical characterization, statistical analysis, signature analysis, and process experiments can provide important clues that allow us to infer the cause of failure. But only full root-cause physical failure analysis can provide the incriminating evidence necessary to correct problems with confidence: the picture worth a thousand words. The crucial element of failure analysis is fault localization, a task for which both hardware and software techniques exist (see the adjacent box). Trends toward denser circuits and more sophisticated packaging, however, are limiting physical access to internal chip circuitry and thus diminishing the effectiveness of hardware-based diagnostics. This article reviews hardware and software options for fault localization and shows why software diagnostics must become a key focus within the design, test, and failure analysis communities.

Low Cost Debug Architecture using Lossy Compression for Silicon Debug

“…Physical probing can also be used for screening electrical bugs, however, despite the recent advancements in this research field, the complexity of state-of-the-art devices requires a localization step to precede the destructive IC failure analysis. This step, which we call logic probing, correlates the simulation data to what is observed in the silicon (either on the input/outputs (I/Os) or on the internal signals, which are observed as discussed in the following paragraphs) in order to identify a subset of circuit nodes that need to be physically probed [20]. In addition, because many design errors in application specific integrated circuits (ASICs) are undetected functional bugs, physical probing is of no use for identifying them during the post-silicon phase.…”

Second-harmonic generation reveals the oxidation steps in semiconductor processing

“…[3][4][5] This has brought significant challenges for both the manufacturing process and the characterization techniques. 6 As opposed to Si channel devices, where Si forms a natural interface with SiO 2 as a dielectric or interfacial layer, the use of Ge implies additional process steps to grow the channel. Moreover, alternative methods of passivation would need to be employed due to the limitations of GeO 2 .…”

Second-harmonic generation as characterization tool for Ge/high-k dielectric interfaces

“…11 The implementation of both an alternative channel material and an alternative oxide layer brings additional challenges to semiconductor research as well as to characterization techniques. 12 Any electrical defects at the interface screen the channel below and induce a delay in switching the semiconductor device on or off. Hence, improvement in understanding or production of the passivation layer is of great importance.…”