2019
DOI: 10.1109/jssc.2018.2873582
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IBM z14: Processor Characterization and Power Management for High-Reliability Mainframe Systems

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Cited by 13 publications
(2 citation statements)
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“…This paper introduces the designs of an agricultural UAV measurement and control cloud platform built on IBM mainframe [2]. The system aim to enhance the UAV management system of UAV Companies, making UAV information management and UAV dispatch more convenient, fast, reasonable and humanized, and at the same time prioritizing safety [3]; assisting UAV companies to improve their business level through agricultural big data, cloud platform computing and Beidou navigation satellite system. Furthermore, the system assisting government agriculture sector and agricultural scientific research institutions to carry out agricultural planning, economic analysis and future agricultural development plans through agricultural big data and cloud platform computing, so as to contribute to the modernization development of domestic agriculture.…”
Section: Introductionmentioning
confidence: 99%
“…This paper introduces the designs of an agricultural UAV measurement and control cloud platform built on IBM mainframe [2]. The system aim to enhance the UAV management system of UAV Companies, making UAV information management and UAV dispatch more convenient, fast, reasonable and humanized, and at the same time prioritizing safety [3]; assisting UAV companies to improve their business level through agricultural big data, cloud platform computing and Beidou navigation satellite system. Furthermore, the system assisting government agriculture sector and agricultural scientific research institutions to carry out agricultural planning, economic analysis and future agricultural development plans through agricultural big data and cloud platform computing, so as to contribute to the modernization development of domestic agriculture.…”
Section: Introductionmentioning
confidence: 99%
“…IBM z15 [9,72,101] and prior system generations [10,11,17,28,50,51,80,95,96] implemented shared physical L3 caches on the processor chip, and had a separate chip that implemented a large L4 cache. The Telum design implements all of that logic in a single chip, and opts to quadruple the L2 cache to 32 MB with very low latency.…”
Section: Introductionmentioning
confidence: 99%