IA-32 Processor with a Wide-Voltage-Operating Range in 32-nm CMOS

Ruhl, G.; Dighe, Saurabh; Jain, Shailendra; Khare, Surhud; Vangal, Sriram

doi:10.1109/mm.2013.8

Cited by 12 publications

(5 citation statements)

References 2 publications

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“…Studies have found that the optimal supply voltage resides just above the threshold voltage of the transistor [7], and it has since been experimentally proven by many silicon prototypes [8,9]. To gain a more intuitive understanding of NTC, it helps to breakdown the entire power consumption into the dynamic power and the static power.…”

Section: Energy Efficiency Of Ntcmentioning

confidence: 99%

Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

Yan

Verma

et al. 2018

JLPEA

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Energy-efficient microprocessors are essential for a wide range of applications. While near-threshold computing is a promising technique to improve energy efficiency, optimal supply demands from logic core and on-chip memory are conflicting. In this paper, we perform static reliability analysis of 6T SRAM and discover the variance among different sizing configuration and asymmetric minimum voltage requirements between read and write operations. We leverage this asymmetric property i n near-threshold processors equipped with voltage boosting capability by proposing an opportunistic dual-supply switching scheme with a write aggregation buffer. Our results show that proposed technique improves energy efficiency by more than 21.45% with approximate 10.19% performance speed-up.

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Section: Energy Efficiency Of Ntcmentioning

confidence: 99%

Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

Yan

Verma

et al. 2018

JLPEA

View full text Add to dashboard Cite

show abstract

“…Studies have found that the optimal supply voltage resides just above the threshold voltage of the transistor [5], and it has since been experimentally proven by many silicon prototypes [6,7]. To gain a more intuitive understanding of NTC, it helps to breakdown the entire power consumption into the dynamic power and the static power.…”

Section: Energy Efficiency Of Ntcmentioning

confidence: 99%

Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

Gu¹,

Yan²,

Verma³

et al. 2018

Preprint

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Energy-efficient microprocessors are essential for a wide range of applications. While near-threshold computing is a promising technique to improve energy efficiency, optimal supply demands from logic core and on-chip memory are conflicting. In this paper, we perform static reliability analysis of 6T SRAM and discover the variance among different sizing configuration and asymmetric minimum voltage requirements between read and write operations. We leverage this asymmetric property in near-threshold processors equipped with voltage boosting capability by proposing an opportunistic dual-supply switching scheme with a write aggregation buffer. Our results show that proposed technique improves energy efficiency by more than 21.45% with approximate 10.19% performance speed-up.

show abstract

“…Karpuzcu et al [7] proposed a process variation-aware thread scheduling and frequency assignment technique that exploits a heterogeneity of clusters in an NTV many-core processor. Some prior work demonstrated silicon implementations for NTV processors [15] which use different voltages for SRAM arrays for better stability; however, our designs selectively supply the boosted V dd only to the faulty cache memories.…”

Section: Related Workmentioning

confidence: 99%

“…Compared to conventional coarse-grained voltage boosting techniques [12][13] [15] [16], our fine-grained voltage boosting techniques considerably improve processors' yield. Moreover, energy efficiency of our proposed techniques reduces leakageinduced yield losses.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Fine-Grained Voltage Boosting for Improving Yield in Near-Threshold Many-Core Processors

Kong

Munir

Koushanfar

2015

Proceedings of the 25th Edition on Great Lakes Symposium on VLSI

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Process variation is a major impediment in optimizing yield, energy, and performance in near-threshold many-core processors. In this paper, we present a comprehensive analysis on yield losses in near-threshold many-core processors. Based on our analysis, we propose energyefficient yield improvement techniques for near-threshold many-core processors: SRAM cell arrays and Wordline driver voltage Boosting (SWBoost) and Cache voltage Boosting (CBoost). Results reveal that SWBoost and CBoost improve a chip yield by up to 66% and 83%, respectively.Furthermore, runtime energy overheads of SWBoost and CBoost are only 0.46% and 0.54%, respectively, which are much lower than conventional voltage boosting techniques.

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IA-32 Processor with a Wide-Voltage-Operating Range in 32-nm CMOS

Cited by 12 publications

References 2 publications

Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

Exploiting Read/Write Asymmetry to Achieve Opportunistic SRAM Voltage Switching in Dual-Supply Near-Threshold Processors

Fine-Grained Voltage Boosting for Improving Yield in Near-Threshold Many-Core Processors

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