2018
DOI: 10.1149/08610.0051ecst
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(Invited) Issues with n-type Dopants in Germanium

Abstract: The last decade has seen considerable experimental and theoretical work towards the use of germanium for high-speed low-power electronics. Despite the demonstration of high performance p-channel Ge transistors in planar and non-planar device technology, fabrication of n-channel Ge transistors faces a number of scientific and technological challenges, which hinder the development of CMOS logic circuits based entirely on Ge. Major challenge constitutes the control of fast n-type dopant (out-/in-)diffusion in Ge,… Show more

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Cited by 5 publications
(5 citation statements)
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References 20 publications
(31 reference statements)
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“…Similar surface structures have already been observed at the early stages of melting induced by NLA of Si and Ge [32,33] or millisecond Flash Lamp Annealing of Si, Ge and SiC [34][35][36]. Similarly to our case, these structures have also been interpreted as the consequence of a local melt of the material at the beginning of the melting process.…”
Section: Iii1b Surface Structures At the Melt Thresholdsupporting
confidence: 86%
“…Similar surface structures have already been observed at the early stages of melting induced by NLA of Si and Ge [32,33] or millisecond Flash Lamp Annealing of Si, Ge and SiC [34][35][36]. Similarly to our case, these structures have also been interpreted as the consequence of a local melt of the material at the beginning of the melting process.…”
Section: Iii1b Surface Structures At the Melt Thresholdsupporting
confidence: 86%
“…(According to this scheme the alumina layer is reduced by the deposited aluminum forming an AlO x interfacial layer, while the released aluminum from the Al 2 O 3 layer diffused towards the Ge substrate to form the AlGeO interfacial layer at the Ge interface). 8 The composition of the Al 2 O 3 /Ge interface of both samples was studied using ex situ XPS measurements. The presence of the Al 2 O 3 film is verified by the Al2p spectrum (not shown) with an expected peak binding energy at 74.6 eV.…”
Section: Structural Characteristics: Experimental Results and Discussionmentioning
confidence: 99%
“…[1][2][3][4][5][6] These studies showed that although Ge is CMOS compatible, it exhibits quite different behavior raising processing issues related to critical fabrication steps of the MOS device. 7,8 The formation of a good quality interface between the gate insulator and the Ge substrate remains a challenge. Among the methods available to fabricate a well passivated Ge interface there is the formation of a relatively thick GeO x or AlGeO interfacial layer between the dielectric and the Ge substrate.…”
mentioning
confidence: 99%
“…Besides, the n-type doping level as high as 1×10 20 cm −3 activation concentration with low diffusion is usually necessary for a downscaling beyond 15 nm. However, it is hard to fulfill the high level n-type doping in Ge because of low solid solubility and large diffusion coefficient of V-group impurity, [6] which will restrict its applications to some extent. In order to obtain heavy n-type doping in Ge, the combination of ion implantation and post-annealing process is frequently utilized.…”
Section: Introductionmentioning
confidence: 99%