Hyperdimensional biosignal processing: A case study for EMG-based hand gesture recognition

Rahimi, Abbas; Benatti, Simone; Kanerva, Pentti; Benini, Luca; Rabaey, Jan M.

doi:10.1109/icrc.2016.7738683

Cited by 161 publications

(150 citation statements)

References 17 publications

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“…We evaluate our accelerator on an EMG dataset acquired from five subjects [19]. The EMG signals are sampled at 500 Hz from four channels placed on the forearm of the subjects.…”

Section: Experimental Setup and Resultsmentioning

confidence: 99%

“…Besides the discrete symbols, the system has analog values (e.g., the signal levels of channels) for mapping. To map these analog values, the notion of IM is further extended to a continuous item memory (CIM) [19]. In the continuous vector space of CIM, orthogonal endpoint hypervectors are generated for the minimum and maximum signal levels.…”

Section: Modules Of Hd Classifiermentioning

confidence: 99%

“…For instance, when the channel i produces a maximum signal level at time t and the minimum signal level at t + k, the corresponding generated hypervectors by CIM are orthogonal, i.e., V t i ⊥ V t +k i . The hypervectors for intermediate levels are then generated by linear interpolation between these endpoints and are prestored in the CIM [19,21]. The IM and CIM stay fixed throughout the computation, and they serve as seeds from which further representations are made.…”

Section: Modules Of Hd Classifiermentioning

confidence: 99%

“…HD computing has also been used for multimodal data fusion and prediction, including categorization of body physical activities from several heterogeneous sensors [23], predicting behavior of mobiledevice users (e.g., media player prediction) [24], and reactive robot learning [14]. More recently, HD computing has shown promise in biosignal processing and classification of raw electromyography (EMG) [19] as well as electroencephalography (EEG) [21] data with minimal information: e.g., in the absence of domain expert knowledge and using smaller training datasets, without affecting the robustness of classification.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

PULP-HD: Accelerating Brain-Inspired High-Dimensional Computing on a Parallel Ultra-Low Power Platform

Montagna

Rahimi

Benatti

et al. 2018

2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

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Computing with high-dimensional (HD) vectors, also referred to as hypervectors, is a brain-inspired alternative to computing with scalars. Key properties of HD computing include a well-defined set of arithmetic operations on hypervectors, generality, scalability, robustness, fast learning, and ubiquitous parallel operations. HD computing is about manipulating and comparing large patternsbinary hypervectors with 10,000 dimensions-making its efficient realization on minimalistic ultra-low-power platforms challenging. This paper describes HD computing's acceleration and its optimization of memory accesses and operations on a silicon prototype of the PULPv3 4-core platform (1.5 mm 2 , 2 mW), surpassing the stateof-the-art classification accuracy (on average 92.4%) with simultaneous 3.7× end-to-end speed-up and 2× energy saving compared to its single-core execution. We further explore the scalability of our accelerator by increasing the number of inputs and classification window on a new generation of the PULP architecture featuring bitmanipulation instruction extensions and larger number of 8 cores. These together enable a near ideal speed-up of 18.4× compared to the single-core PULPv3.

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“…We evaluate our accelerator on an EMG dataset acquired from five subjects [19]. The EMG signals are sampled at 500 Hz from four channels placed on the forearm of the subjects.…”

Section: Experimental Setup and Resultsmentioning

confidence: 99%

Section: Modules Of Hd Classifiermentioning

confidence: 99%

Section: Modules Of Hd Classifiermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

PULP-HD: Accelerating Brain-Inspired High-Dimensional Computing on a Parallel Ultra-Low Power Platform

Montagna

Rahimi

Benatti

et al. 2018

2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

Self Cite

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show abstract

“…A purely combinational, LUT-based spatial encoder architecture. is is the starting point for optimizations and was described in [28]. See Figure 13a.…”

Section: Library: Spatial Encoder Modulesmentioning

confidence: 99%

Hardware Optimizations of Dense Binary Hyperdimensional Computing: Rematerialization of Hypervectors, Binarized Bundling, and Combinational Associative Memory

Schmuck

Benini

Rahimi

2019

J. Emerg. Technol. Comput. Syst.

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Brain-inspired hyperdimensional (HD) computing models neural activity pa erns of the very size of the brain's circuits with points of a hyperdimensional space, that is, with hypervectors. Hypervectors are D-dimensional (pseudo)random vectors with independent and identically distributed (i.i.d.) components constituting ultra-wide holographic words: D = 10, 000 bits, for instance. At its very core, HD computing manipulates a set of seed hypervectors to build composite hypervectors representing objects of interest. It demands memory optimizations with simple operations for an e cient hardware realization. In this paper, we propose hardware techniques for optimizations of HD computing, in a synthesizable open-source VHDL library, to enable co-located implementation of both learning and classi cation tasks on only a small portion of Xilinx ® UltraScale ™ FPGAs: (1) We propose simple logical operations to rematerialize the hypervectors on the y rather than loading them from memory. ese operations massively reduce the memory footprint by directly computing the composite hypervectors whose individual seed hypervectors do not need to be stored in memory.(2) Bundling a series of hypervectors over time requires a multibit counter per every hypervector component. We instead propose a binarized back-to-back bundling without requiring any counters. is truly enables on-chip learning with minimal resources as every hypervector component remains binary over the course of training to avoid otherwise multibit components. (3) For every classi cation event, an associative memory is in charge of nding the closest match between a set of learned hypervectors and a query hypervector by using a distance metric. is operator is proportional to hypervector dimension (D), and hence may take O(D) cycles per classi cation event. Accordingly, we signi cantly improve the throughput of classi cation by proposing associative memories that steadily reduce the latency of classi cation to the extreme of a single cycle. (4) We perform a design space exploration incorporating the proposed techniques on FPGAs for a wearable biosignal processing application as a case study. Our techniques achieve up to 2.39× area saving, or 2337× throughput improvement. e Pareto optimal HD architecture is mapped on only 18340 con gurable logic blocks (CLBs) to learn and classify ve hand gestures using four electromyography sensors.

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NetHD: Neurally Inspired Integration of Communication and Learning in Hyperspace

Poduval,

Ni,

Zou

et al. 2024

Advanced Intelligent Systems

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The 6G network, the next‐generation communication system, is envisaged to provide unprecedented experience through hyperconnectivity involving everything. The communication should hold artificial intelligence‐centric network infrastructures as interconnecting a swarm of machines. However, existing network systems use orthogonal modulation and costly error correction code; they are very sensitive to noise and rely on many processing layers. These schemes impose significant overhead on low‐power internet of things devices connected to noisy networks. Herein, a hyperdimensional network‐based system, called , is proposed, which enables robust and efficient data communication/learning. exploits a redundant and holographic representation of hyperdimensional computing (HDC) to design highly robust data modulation, enabling two functionalities on transmitted data: 1) an iterative decoding method that translates the vector back to the original data without error correction mechanisms, or 2) a native hyperdimensional learning technique on transmitted data with no need for costly data decoding. A hardware accelerator that supports both data decoding and hyperdimensional learning using a unified accelerator is also developed. The evaluation shows that provides a bit error rate comparable to that of state‐of‐the‐art modulation schemes while achieving 9.4 faster and 27.8 higher energy efficiency compared to state‐of‐the‐art deep learning systems.

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Hyperdimensional biosignal processing: A case study for EMG-based hand gesture recognition

Cited by 161 publications

References 17 publications

PULP-HD: Accelerating Brain-Inspired High-Dimensional Computing on a Parallel Ultra-Low Power Platform

PULP-HD: Accelerating Brain-Inspired High-Dimensional Computing on a Parallel Ultra-Low Power Platform

Hardware Optimizations of Dense Binary Hyperdimensional Computing: Rematerialization of Hypervectors, Binarized Bundling, and Combinational Associative Memory

NetHD: Neurally Inspired Integration of Communication and Learning in Hyperspace

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