Considering the rapid progress and widespread deployment of multimedia technologies, a large-capacity access network will be required in the near future. To accommodate various communication, computing, and broadcast services, we have been developing an ultra-broadband optical access system, Gigabit-To-The-Home (GTTH) [l]. It offers a downlink capacity of 2.5 Gb/s (01.5 p) and an uplink capacity of 156 Mb/s (01.3 pn) through a Passive Optical Network (PON). The most important thing that needs to be done in order to facilitate rapid and widespread deployment of a multi-Gb/s optical access network is to reduce the cost and size of optical network units (ONUS). And the most effective way to do this is to integrate optical components (Tx, Rx, WDM) and a front-end IC into a single module. We have therefore developed a high-speed transceiver module based on planar lightwave circuit (PLC) technology.The distinctive features of this module, which is the fastest PLC module ever reported, are its use of PLC, superlathce avalanche photodiode (SL-APD)[2], and one-chip receiver IC. The use of PLC technology is essential for achieving compact integration and facilitating assembly of optical components[3]. The use of an SL-APD results in high receiver sensitivity at 2.5 Gb/s, which in turn allows utilization of the optical network infrastructures designed for the conventional 156-Mb/s PON. The one-chip receiver IC also contributes to size and cost reduction, since the 3R functions (reshaping, regeneration, retiming) are integrated into a single chip.A photograph of the PLC module is shown in Figure 1 and its configuration is shown in Figure 2. The uplink Tx (1.3-pm FP-LD), downlink Rx (SL-APD) and optical fiber are passively aligned to a PLC platform. A 1.5-pm optical bandpass filter is set on the waveguide facet of PLC for filtering the 1 . 5 -p downstream signal from the 1.3-pm upstream signal. As shown in Figure 2, the PLC in this prototype version contains a Y-branch. This branch, however, is not essential; Y-branch and the 3-dB power loss due to it can be eliminated. The downstream signal is O/E transformed by the SL-APD which has a sensitive area 42 juri in diameter. The one-chip receiver IC was placed close behind the APD carrier in order to keep the wire length between the two components short for high-speed operation.