Hybrid voltage vector preselection based model predictive control to reduce the common‐mode voltage for 2‐level voltage source inverters

Abstract

Model predictive control (MPC) strategies have been frequently studied in recent years. To reduce the common-mode voltage (CMV) as well as the current total harmonic distortions (THDs) of the 2-level voltage sources (2L-VSIs), a new MPC strategy is proposed in this study considering both the dead-time and the one-step delay effects. First, the reference voltage vector (VV) prediction based MPC strategy is utilised as it is simple and accurate. Next, the VV preselection strategy is studied in detail to remove the CMV spikes. The effects of the dead time on the CMV are analysed, and an improved VV preselection strategy is presented to reduce the CMV spikes. Then, the one-step delay effects are also analysed, and further improvements are made to completely remove the CMV spikes. Moreover, the maximum variation of the current during one control period is studied in-depth to provide a solid theory foundation for dividing the current sector more accurately. As the six non-zero VVs of the 2L-VSI are fully used in the proposed method, not only the CMV but also the current THDs are reduced. Finally, comparative simulation and experimental studies are carried out to validate the effectiveness of the proposed method. 2 Conventional MPC strategy for 2L-VSIs The topology of the 2L-VSI is shown in Fig. 1a. Fig. 1b shows the eight VVs of the 2L-VSI, including two zero VVs, i.e. u 0 (000), and

An Impedance Source Multi-Level Three Phase Inverter with Common Mode Voltage Elimination and Dead Time Compensation

“…The dead time requirement for the proper operation of power switches in a bridge configuration is also a source of high frequency noise, contributing to the sharp edged CMV transitions as well as to an increase in its amplitude. The proposed SVPWM variant is Methods Max{CMV} [6] V dc /6 [8] V dc /2 [9] V dc /6 [16] V dc / √ 3 [17] V dc /2 Proposed approach Zero…”

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